Benutzerhandbuch für SDI Technologies SDIO Card

Inhaltsverzeichnis

• 7

  0
• 1. General Description

  1
• SDIO Features

  1
• Primary Reference Document

  1
• Standard SDIO Functions

  1
• 2. SDIO Signaling Definition

  2
• SDIO Card Types

  2
• SDIO Card modes

  2
• SPI (Card mandatory support)

  2
• 1-bit SD Data Transfer Mode (Card Mandatory Support)

  2
• 4-bit SD Data Transfer Mode (Mandatory for High-Speed Cards, Optional for Low-Speed)

  2
• SDIO Host Modes

  2
• Signal Pins

  3
• Figure 2-1 Signal connection to two 4-bit SDIO cards

  3
• 3. SDIO Card Initialization

  4
• Differences in I/O card Initialization

  4
• Figure 3-1 SDIO response to non-I/O aware initialization

  4
• Figure 3-2 Card initialization flow in SD mode (SDIO aware host)

  7
• Figure 3-3 Card initialization flow in SPI mode (SDIO aware host)

  9
• The IO_SEND_OP_COND Command (CMD5)

  10
• Table 3-1 OCR Values for CMD5

  10
• Figure 3-4 IO_SEND_OP_COND Command (CMD5)

  10
• The IO_SEND_OP_COND Response (R4)

  11
• Figure 3-5 Response R4 in SD mode

  11
• Figure 3-6 Response R4 in SPI mode

  11
• Figure 3-7 Modified R1 Response

  11
• Special Initialization considerations for Combo Cards

  12
• Re-initialize both I/O and Memory

  12
• Using a Combo Card as SDIO only or SD Memory only after Combo Initialization

  12
• Acceptable Commands after Initialization

  12
• Recommendations for RCA after Reset

  12
• Figure 3-8 Re-Initialization Flow for I/O Controller

  13
• Figure 3-9 Re-Initialization Flow for Memory controller

  13
• Enabling CRC in SPI Combo Card

  14
• 4. Differences with SD Memory Specification

  15
• SDIO Command List

  15
• Unsupported SD Memory Commands

  15
• Modified R6 Response

  16
• Reset for SDIO

  16
• Bus Width

  16
• Table 4-1 Unsupported SD Memory Commands

  16
• Table 4-2 R6 response to CMD3

  16
• Table 4-3 SDIO R6 Status Bits

  16
• Card Detect Resistor

  17
• Timings

  17
• Table 4-4 Combo Card 4-bit Control

  17
• Table 4-5 Card Detect Resistor States

  17
• Table 4-6 is blanked

  17
• Data Transfer Block Sizes

  18
• Data Transfer Abort

  18
• Read Abort

  18
• Write Abort

  18
• 4.10.1 OCR Register

  19
• 4.10.2 CID Register

  19
• 4.10.3 CSD Register

  19
• 4.10.4 RCA Register

  19
• 4.10.5 DSR Register

  19
• 4.10.6 SCR Register

  19
• 4.10.7 SD Status

  19
• 4.10.8 Card Status Register

  19
• Table 4-7 SDIO Status Register Structure

  20
• 5. New I/O Read/Write Commands

  21
• IO_RW_DIRECT Command (CMD52)

  21
• Figure 5-1 IO_RW_DIRECT Command

  21
• IO_RW_DIRECT Response (R5)

  22
• CMD52 Response (SD modes)

  22
• Figure 5-2 R5 IO_RW_DIRECT Response (SD modes)

  22
• R5, IO_RW_DIRECT Response (SPI mode)

  23
• Table 5-1 Flag data for IO_RW_DIRECT SD Response

  23
• Figure 5-3 IO_RW_DIRECT Response in SPI Mode

  23
• IO_RW_EXTENDED Command (CMD53)

  24
• Table 5-2 IO_RW_ EXTENDED command Op Code Definition

  24
• Figure 5-4 IO_RW_EXTENDED Command

  24
• CMD53 Data Transfer Format

  25
• Special Timing for CMD53 Multi-Block Read

  25
• Table 5-3 Byte Count Values

  25
• 6. SDIO Card Internal Operation

  26
• Overview

  26
• Register Access Time

  26
• Interrupts

  26
• Suspend/Resume

  27
• Read Wait

  27
• CMD52 During Data Transfer

  27
• SDIO Fixed Internal Map

  27
• Common I/O Area (CIA)

  28
• Card Common Control Registers (CCCR)

  28
• Figure 6-1 SDIO Internal Map

  28
• Table 6-1 Card Common Control Registers (CCCR)

  29
• Table 6-2 CCCR bit Definitions

  34
• Table 6-3 Function Basic Information Registers (FBR)

  35
• Table 6-4 FBR bit and field definitions

  36
• 6.11 Card Information Structure (CIS)

  37
• 6.13 Setting Block Size with CMD53

  37
• Table 6-5 Card Information Structure (CIS) and reserved area of CIA

  37
• Figure 6-2 State Diagram for Bus State Machine

  38
• 7. Embedded I/O Code Storage Area (CSA)

  39
• CSA Access

  39
• CSA Data Format

  39
• 8. SDIO Interrupts

  40
• Interrupt Timing

  40
• SPI and SD 1-bit Mode Interrupts

  40
• SD 4-bit Mode

  40
• Interrupt Period Definition

  40
• Interrupt Period at the Data Block Gap in 4-bit SD Mode (Optional)

  40
• Inhibited Interrupts (Removed Section)

  40
• End of Interrupt Cycles

  40
• Terminated Data Transfer Interrupt Cycle

  41
• Interrupt Clear Timing

  41
• 9. SDIO Suspend/Resume Operation

  42
• 10. SDIO Read Wait Operation

  43
• 11. Power Control

  44
• 11.2 Power Control support for SDIO Cards

  44
• 11.2.1 Master Power Control

  44
• 11.2.2 Power Selection

  45
• 11.2.3 High-Power Tuples

  45
• 11.3.1 Version 1.10 Host

  45
• Table 11-1 Reference Tuples by Master Power Control and Power Select

  45
• 11.3.2 Power Control Operation

  46
• 12. High-Speed Mode

  47
• 12.2 Switching Bus Speed Mode in a Combo Card

  47
• 13. SDIO Physical Properties

  48
• 13.2 Full-Size SDIO

  48
• 14. SDIO Power

  48
• 14.2 SDIO Power Consumption

  48
• 15. Inrush Current Limiting

  50
• 16. CIS Formats

  51
• 16.2 Basic Tuple Format and Tuple Chain Structure

  51
• Table 16-1 Basic Tuple Format

  51
• 16.4 Tuple Version

  52
• Table 16-2 Tuples Supported by SDIO Cards

  52
• 16.6 CISTPL_MANFID: Manufacturer Identification String Tuple

  53
• 16.7.1 CISTPL_FUNCID: Function Identification Tuple

  53
• Table 16-3 CISTPL_MANFID: Manufacturer Identification Tuple

  53
• Table 16-4 CISTPL_FUNCID Tuple

  53
• 16.7.2 CISTPL_FUNCE: Function Extension Tuple

  54
• 16.7.3 CISTPL_FUNCE Tuple for Function 0 (common)

  54
• Table 16-5 CISTPL_FUNCE Tuple General Structure

  54
• Table 16-6 TPLFID_FUNCTION Tuple for Function 0 (common)

  54
• Table 16-7 TPLFID_FUNCTION Field Descriptions for Function 0 (common)

  54
• 16.7.4 CISTPL_FUNCE Tuple for Function 1-7

  55
• Table 16-8 TPLFID_FUNCTION Tuple for Function 1-7

  55
• Table 16-9 TPLFID_FUNCTION Field Descriptions for Functions 1-7

  57
• Table 16-10 TPLFE_FUNCTION_INFO Definition

  57
• Table 16-11 TPLFE_CSA_PROPERTY Definition

  57
• 16.7.5 CISTPL_SDIO_STD: Function is a Standard SDIO Function

  58
• 16.7.6 CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards

  58
• Table 16-12 CISTPL_SDIO_STD: Tuple Reserved for SDIO Cards

  58
• Table 16-13 CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards

  58
• Appendix A

  59
• Table A-14 SD Mode Command List

  59
• Table A-15 SPI Mode Command List

  60
• Appendix B

  61
• Appendix C

  62
• Appendix D

  64