Benutzerhandbuch für Texas Instruments Evaluation Module for TPS59610 TPS59610EVM-675

Inhaltsverzeichnis

• An 8-V to14-V Vin 2010 Atom™ E6xx Tunnel Creek Power System

  1
  • 1 Description

    4
    • 1.1 Typical Applications

      4
    • 1.2 Features

      4
  • 2 Atom Tunnel Creek Power System Block Diagram

    4
  • 3 Electrical Performance Specifications

    5
  • 4 Schematics

    7
  • 5 Test Setup

    12
    • 5.1 Test Equipment

      12
    • 5.2 Recommended Test Setup

      12
  • 6 Configuration

    13
    • 6.1 CPU and GPU Configuration

      13
      • 6.1.1 Current-Limit Trip Selection (J104 for CPU and J204 for GPU)

        13
      • 6.1.2 Frequency Selection (J103 for CPU and J203 for GPU)

        13
      • 6.1.3 Overshoot Reduction Selection (J105 for CPU and J205 for GPU)

        13
      • 6.1.4 VID Bits Selection

        14
      • 6.1.5 Deep Sleep Mode Selection (DPRSLPVR)

        14
      • 6.1.6 Overvoltage Protection Selection (JP101 for CPU and JP201 for GPU)

        14
      • 6.1.7 Onboard Dynamic Load Selection (SW501 for CPU and SW502 for GPU)

        15
      • 6.1.8 Enable Selection (S101 for CPU and S201 for GPU)

        15
    • 6.2 5-V/3.3-V System Configuration

      15
      • 6.2.1 3.3VBIAS Enable Selection (J303)

        15
      • 6.2.2 5-V/3.3-V Enable Selection (J301 for 5 V and J302 for 3.3 V)

        15
    • 6.3 DDR 1.8-V/1.05-V CPU VTT Configuration

      15
      • 6.3.1 1.8-V/1.05-V Enable can be set by J402 for 1.8 V and J401 for 1.05 V, EN_1.8V and EN_1.05V

        15
    • 6.4  0.9-V VTT and 0.9-V VTTREF Configuration

      16
      • 6.4.1  0.9-V VTT and 0.9-V VTTREF Enable Selection (SW401 for S3, SW400 for S5)

        16
    • 6.5  1.5-V CPU PLL Configuration

      16
      • 6.5.1  1.5-V Enable Selection (J406)

        16
    • 6.6  1.05-V CPU C6 RAM Configuration

      16
      • 6.6.1  1.05-V CPU C6 RAM Enable Selection (J408)

        16
    • 6.7  1.2-V IOH Configuration

      17
      • 6.7.1  1.2-V Enable Selection (J501)

        17
  • 7 Test Procedure

    17
    • 7.1 Line/Load Regulation and Efficiency Measurement Procedure

      17
    • 7.2  Onboard Transient Response Measurement

      17
    • 7.3  Loop Gain/Phase Measurement

      18
    • 7.4 Equipment Shutdown

      18
  • 8 Performance Data and Typical Characteristic Curves

    19
    • 8.1 CPU

      19
    • 8.2 GPU

      23
    • 8.3 5-V/3.3-V System

      26
    • 8.4 1.8-V DDR/1.05-V CPU VTT

      30
    • 8.5 1.2-V IOH

      33
  • 9 EVM Assembly Drawings and PCB Layout

    35
  • 10 Bill of Materials

    37
• Important Notices

  39