Avaya 03-300430 User Manual

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DS1-BD (DS1 Interface Circuit Pack)
Issue 1 June 2005
1023
 
Translation Update Test (#146)
The Translation Update test sends the circuit pack-level information specified by System 
Administration to the DS1 Interface circuit pack. Translation includes the following data 
administered for a DS1 Interface circuit pack (see output of display ds1 location): DS1 
Link Length between two DS1 endpoints, Synchronization Source Control, All Zero 
Suppression, Framing Mode, Signaling Mode, time-slot number of 697-Hz tone, time-slot 
number of 700-Hz tone, etc.
If a TN767E or later DS1 circuit pack is combined with a 120A CSU module or a T1 sync splitter 
to screen an integrated CSU module, this test will also send the administration for this 
Integrated CSU to the circuit pack to assure the board’s translations are correct. The 
administration of the CSU module is done using the DS1 circuit pack administration screen. 
Translation for the CSU module includes the following data: Transmit LBO, Receive ALBO, 
Supply CPE loop-back jack Power, and so forth.
0
NO 
BOARD
The test could not relate the internal ID to the port (no board).
This could be due to incorrect translations, no board is inserted, an 
incorrect board is inserted, or an insane board is inserted.
1. Verify that the board’s translations are correct. Use add ds1 
location to administer the DS1 interface if it is not already 
administered.
2. If board was already administered correctly, check the error log to 
determine whether the board is hyperactive. If so, the board was shut 
down. Reseating the board will re-initialize it.
3. If the board was found to be correctly inserted in step 1, enter busyout 
board
4. Enter reset board
5. Enter release board
6. Enter test board long
This should re-establish the link between the internal ID and the port.
Table 351: Test #145 Misframe Alarm Inquiry Test  (continued)
Error 
Code
Test 
Result
Description / Recommendation
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