Intel N475 AU80610006240AA User Manual

40

Datasheet

The processor supports the THERMTRIP# signal for catastrophic thermal protection. An 
external thermal sensor should also be used to protect the processor and the system 
against excessive temperatures. Even with the activation of THERMTRIP#, which halts 
all processor internal clocks and activity, leakage current can be high enough such that 
the processor cannot be protected in all conditions without the removal of power to the 
processor. If the external thermal sensor detects a catastrophic processor temperature 
of 125°C (maximum), or if the THERMTRIP# signal is asserted, the V

CC

 supply to the 

processor must be turned off within 500 ms to prevent permanent silicon damage due 
to thermal runaway of the processor. THERMTRIP# functionality is not ensured if the 
PWRGOOD signal is not asserted.

The following are the general types of reserved (RSVD) signals and connection 
guidelines:

•

RSVD - these signals should not be connected

•

RSVD_TP - these signals should be routed to a test point

•

RSVD_NCTF - these signals are non-critical to function and may be left un-
connected

Arbitrary connection of these signals to V

CC

*, V

SS

*, or to any other signal (including 

each other) may result in component malfunction. See 

 for a land listing of the processor and the location of all reserved signals. 

For reliable operation, always connect unused inputs or bi-directional signals to an 
appropriate signal level. Unused active high inputs should be connected through a 
resistor to ground (V

SS

). Unused outputs maybe left unconnected; however, this may 

interfere with some Test Access Port (TAP) functions, complicate debug probing, and 
prevent boundary scan testing. A resistor must be used when tying bi-directional 
signals to power or ground. When tying any signal to power or ground, a resistor will 
also allow for system testability. Resistor values should be within ±20% of the 
impedance of the baseboard trace.

Signals are grouped by buffer type and similar characteristics as listed in 

. The buffer type indicates which signaling technology and 

specifications apply to the signals. All the differential signals, and selected DDR2 and 
Control Sideband signals have On-Die Termination (ODT) resistors. There are some 
signals that do not have ODT and need to be terminated on the board. 

All Control Sideband Asynchronous signals are required to be asserted/deasserted for 
at least eight BCLKs in order for the processor to recognize the proper signal state. See 

 for the DC and AC specifications.