Motorola MVME187 User Manual

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Board Level Hardware Description
2
Memory Maps
There are two points of view for memory maps: 
1. Local bus memory map
Рthe mapping of all resources as viewed by local bus 
masters
2. VMEbus memory map
Рthe mapping of onboard resources as viewed by VMEbus 
Masters
Local Bus Memory Map
The local bus memory map is split into different address spaces by 
the transfer type (TT) signals. The local resources respond to the 
normal access and interrupt acknowledge codes. 
Normal Address Range Devices
The memory map of devices that respond to the normal address 
range is shown in the following tables. The normal address range is 
defined by the Transfer Type (TT) signals on the local bus. 
On the MVME187, Transfer Types 0 and 1 define the normal 
address range. 
$FFFFFFFF. Many areas of the map are user-programmable, and 
suggested uses are shown in the table. 
The cache inhibit function is programmable in the MMUs. 
The onboard I/O space must be marked cache inhibit and 
serialized in its page table. 
devices.