Motorola PrPMC800/800ET Processor PMC Module User Manual
3 Functional Description
PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)
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The following special function processor PMC pins, as defined by the draft Processor PMC
Standard VITA-32-199x, are implemented on the PrPMC800/800ET as described in the
following sections.
Standard VITA-32-199x, are implemented on the PrPMC800/800ET as described in the
following sections.
PRESENT# Signal
The PRESENT# signal on the PrPMC800/800ET module is grounded to indicate to the
baseboard that the module is installed.
baseboard that the module is installed.
MONARCH# Signal
The MONARCH# input signal allows the baseboard to enable the monarch system controller
features on the PrPMC800/800ET
features on the PrPMC800/800ET
module. The PrPMC800/800ET will pull up the MONARCH#
signal. If the baseboard grounds this pin, the PrPMC800/800ET module will operate as a
monarch (master) and provide system initialization and PCI interrupt handling. If the baseboard
leaves the MONARCH# pin floating, the PrPMC800/800ET will operate as a non-monarch
(slave).
monarch (master) and provide system initialization and PCI interrupt handling. If the baseboard
leaves the MONARCH# pin floating, the PrPMC800/800ET will operate as a non-monarch
(slave).
INTA#-INTD# Signals
The four PCI interrupt signals are routed to MPIC external interrupt inputs so that they can be
monitored by the processor when the PrPMC800/800ET is operating in the monarch mode. The
PrPMC800/800ET can generate an interrupt to the host board processor on any one PCI
interrupt INTA#-INTD# by activating the PCI interrupt in the Harrier message passing unit. Refer
to the interrupt section of the Harrier ASIC Programmer’s Reference Guide for interrupt
assignments.
monitored by the processor when the PrPMC800/800ET is operating in the monarch mode. The
PrPMC800/800ET can generate an interrupt to the host board processor on any one PCI
interrupt INTA#-INTD# by activating the PCI interrupt in the Harrier message passing unit. Refer
to the interrupt section of the Harrier ASIC Programmer’s Reference Guide for interrupt
assignments.
IDSELB, REQB#, and GNTB# Signals
The PrPMC800/800ET
module uses the processor PMC second PCI agent signals IDSELB,
REQB# and GNTB# for the IDSEL, REQ# and GNT# signals of the GD82559ER/82551IT
Ethernet chip. IDSELB has a weak onboard pulldown and GNTB# has a weak onboard pullup
so the module operates properly on baseboards that do not support a second PCI agent.
Ethernet chip. IDSELB has a weak onboard pulldown and GNTB# has a weak onboard pullup
so the module operates properly on baseboards that do not support a second PCI agent.
M66EN Signal
The no-Ethernet versions (-21x1, -22x1 and -62x1) of the PrPMC800/800ET module are
designed to operate on a 33 MHz or 66 MHz PCI bus, depending on the state of the M66EN pin
provided by the baseboard. The module will monitor the state of the M66EN pin and set the
multiplier of the on board clock generator at power-up. If the M66EN pin is grounded, the clock
ratio will be 3:1. If M66EN is high, the clock ratio will be set to 3:2.
designed to operate on a 33 MHz or 66 MHz PCI bus, depending on the state of the M66EN pin
provided by the baseboard. The module will monitor the state of the M66EN pin and set the
multiplier of the on board clock generator at power-up. If the M66EN pin is grounded, the clock
ratio will be 3:1. If M66EN is high, the clock ratio will be set to 3:2.
RESETOUT_L Signal
The PrPMC RESETOUT_L output signal (P12-60) provides a means for the PrPMC800/800ET
to reset the baseboard which in turn can reset the PrPMC800/800ET. The active low
RESETOUT_L signal is generated whenever the PrPMC800/800ET power-up reset, Watchdog
Timer 1 reset, debug reset, or a software generated module reset via the Harrier RESET OUT
bit is active. The PMC PCI reset input signal will not generate RESETOUT_L. Refer to
to reset the baseboard which in turn can reset the PrPMC800/800ET. The active low
RESETOUT_L signal is generated whenever the PrPMC800/800ET power-up reset, Watchdog
Timer 1 reset, debug reset, or a software generated module reset via the Harrier RESET OUT
bit is active. The PMC PCI reset input signal will not generate RESETOUT_L. Refer to
for a diagram of the module reset logic.