Motorola PrPMC800/800ET Processor PMC Module User Manual
PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)
3 Functional Description
26
EREADY Signal
The Processor PMC PCI bus Enumeration Ready (EREADY) signal is connected to the Harrier
EREADY pin. Harrier can drive this open drain signal and monitor its state using the Harrier
EREADY and EREADYS status bits. This pin is asserted low by Harrier at power-up and must
be deasserted by software control.
EREADY pin. Harrier can drive this open drain signal and monitor its state using the Harrier
EREADY and EREADYS status bits. This pin is asserted low by Harrier at power-up and must
be deasserted by software control.
PCI Signaling Voltage Level
The PrPMC800/800ET
module is a universal PMC module that will operate with +3.3V or +5V
PCI signaling levels. The Harrier PCI I/O buffers operate at +3.3V output levels and are 5V
tolerant allowing the PCI interface to operate at either voltage level. The one exception is the
PCI CLK input. This is a +3.3V “only” input, which is not +5V tolerant. The PCI clock input signal
is a +3.3V only input.
tolerant allowing the PCI interface to operate at either voltage level. The one exception is the
PCI CLK input. This is a +3.3V “only” input, which is not +5V tolerant. The PCI clock input signal
is a +3.3V only input.
Debug Header
A 2mm, 20-pin right-angle header located on side one of the PrPMC800/800ET provides the
interface to the async serial port, the processor JTAG/COP port, along with the RESET# and
ABORT# signals. The serial port and JTAG/COP interfaces, along with the ABORT_L signal,
are also routed to the PMC P14 connector for host board access.
interface to the async serial port, the processor JTAG/COP port, along with the RESET# and
ABORT# signals. The serial port and JTAG/COP interfaces, along with the ABORT_L signal,
are also routed to the PMC P14 connector for host board access.
ABORT# and RESET# Signals
The debug header provides ABORT# and RESET# inputs for debug purposes. The ABORT#
signal is connected to the Harrier Abort Switch (ABTSW_L) input and generates an MPIC
internal interrupt. The RESET# signal is connected to the Harrier Reset Switch (RSTSW_L)
input that generates a Harrier Reset Out. Each signal is debounced in the Harrier ASIC.
signal is connected to the Harrier Abort Switch (ABTSW_L) input and generates an MPIC
internal interrupt. The RESET# signal is connected to the Harrier Reset Switch (RSTSW_L)
input that generates a Harrier Reset Out. Each signal is debounced in the Harrier ASIC.
Harrier Power-Up Configuration Header
A 2mm, 16-pin low profile header, locate on side one of the module provides the means to
change some of the Harrier power-up configuration settings. See
change some of the Harrier power-up configuration settings. See
for
configuration settings controlled by this header. A 2-mm shunt must be installed to change a
setting. The default configuration setting (with the shunt not installed) is also given in
setting. The default configuration setting (with the shunt not installed) is also given in
.
for the header pin assignments as well.
On-Board LEDs
The PrPMC800/800ET
module provides two LEDs mounted on side two of the module for
status of the CPU and the board fail pin:
❏
The green CPU LED is lit when the DBB# signal of the processor bus is active
(hardware controlled)
❏
The yellow FAIL LED is lit when the Harrier Board Fail bit (BDFL) in the Miscellaneous
Control and Status register is active (software controlled)
Refer to the Harrier ASIC Programmer’s Reference Guide for details of the Miscellaneous
Control and Status register.
Control and Status register.