Motorola MVME1X7P User Manual
Error Conditions
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DMAC TEA - Cause Unidentified
SCC Retry Error
Description:
An error occurred while the DMAC was Local Bus master
and additional status was not provided.
and additional status was not provided.
MPU Notification:
DMAC interrupt (when enabled)
Status:
The DLBE bit is set in the DMAC Status register (address
$FFF40048 bit 6).
$FFF40048 bit 6).
Comments:
An 8- or 16-bit write to the LCSR in the VMEchip2 causes
this error. If the TBL bit is set (address $FFF40048 bit 2),
the error occurred during a command table access;
otherwise the error occurred during a data access.
this error. If the TBL bit is set (address $FFF40048 bit 2),
the error occurred during a command table access;
otherwise the error occurred during a data access.
Description:
Local Bus Retry occurred due to VMEbus Dual Port Lock
or LAN-wanted-Bus while the SCC was Local Bus master.
or LAN-wanted-Bus while the SCC was Local Bus master.
MPU Notification:
SCC Transmit Interrupt or SCC Receive Interrupt
Status:
SCC Transmit Interrupt Status register
SCC Transmit Current Buffer Address register
SCC Receive Interrupt Status register High
SCC Receive Current Buffer Address register PCCchip2
SCC Error Status register ($FFF4201C)
SCC Transmit Current Buffer Address register
SCC Receive Interrupt Status register High
SCC Receive Current Buffer Address register PCCchip2
SCC Error Status register ($FFF4201C)
Comments:
The DMA controllers in the SCC should not be
programmed to access the VMEbus. Refer to the Serial
Port Interface section in this chapter. SCC Transmit and
Receive interrupt enables are controlled in the SCC and in
the PCCchip2.
programmed to access the VMEbus. Refer to the Serial
Port Interface section in this chapter. SCC Transmit and
Receive interrupt enables are controlled in the SCC and in
the PCCchip2.