Soyo SY-K7VEMPRO User Manual

SY-K7VEMPRO 

The motherboard has two DIMM sockets. SDRAM can be installed in one, 
two, or sockets. Using the serial presence detect (SPD) data structure, 
programmed into an E²PROM on the DIMM, the BIOS can determine the 
SDRAM’s size and speed. Minimum DIMM memory size is 32 MB; 
maximum DIMM memory size is 1GB. Memory size and speed can vary 
between sockets. 
The motherboard supports the following memory features: 

  DRAM interface synchronous with host CPU (100/133MHz)     
  Concurrent CPU, AGP, and PCI access 
  Supports SDRAM and VCM SDRAM memory types 
  Different DRAM types may be used in mixed combinations 
  Different DRAM timing for each bank 
  Dynamic Clock Enable (CKE) control for SDRAM power 

reduction in high speed system. 

  The K7VEMPRO supports 2 DIMMs or 4 banks at 133MHz for 

1GB max memory) 

  Flexible row and column addresses 
  64-bit data width only 
  Supports PC100 and PC133 SDRAM 
  Independent SDRAM control for each bank 
  Seamless DRAM command scheduling for maximum DRAM bus 

utilization (e.g., precharge other banks while accessing the current 
bank) 

  Four cache lines (16quadwords) of CPU to DRAM write buffers 
  Four cache lines of CPU to DRAM read prefetch buffers 
  Read around write capability for non-stalled CPU read 
  Speculative DRAM read before snoop result 
  Burst read and write operation 
  BIOS shadow at 16KB increment 
  Decoupled and burst DRAM refresh with staggered RAS timing 
  CAS before RAS or self refresh