Intel S5000PSL User Manual
Design and Environmental Specifications
Intel® Server Boards S5000PSL and S5000XSL TPS
Pin
Signal Name
Description
10 GND
Ground
11 TP_VID_CONN_B11
No
connection
12 V_IO_DDCDAT
DDCDAT
13
V_IO_HSYNC_CONN
HSYNC (horizontal sync)
14
V_IO_VSYNC_CONN
VSYNC (vertical sync)
15 V_IO_DDCCLK
DDCCLK
5.5.2 NIC
Connectors
The server board provides two stacked RJ45 / 2xUSB connectors side-by-side on the back
edge of the board (JA6A1, JA6A2). The pin-out for NIC connectors are identical and are defined
in the following table.
edge of the board (JA6A1, JA6A2). The pin-out for NIC connectors are identical and are defined
in the following table.
Table 24. RJ-45 10/100/1000 NIC Connector Pin-out (JA6A1, JA6A2)
Pin
Signal Name
1 GND
2 P1V8_NIC
3 NIC_A_MDI3P
4 NIC_A_MDI3N
5 NIC_A_MDI2P
6 NIC_A_MDI2N
7 NIC_A_MDI1P
8 NIC_A_MDI1N
9 NIC_A_MDI0P
10 NIC_A_MDI0N
11 (D1)
2 P1V8_NIC
3 NIC_A_MDI3P
4 NIC_A_MDI3N
5 NIC_A_MDI2P
6 NIC_A_MDI2N
7 NIC_A_MDI1P
8 NIC_A_MDI1N
9 NIC_A_MDI0P
10 NIC_A_MDI0N
11 (D1)
NIC_LINKA_1000_N (LED
12 (D2)
NIC_LINKA_100_N (LED)
13 (D3)
NIC_ACT_LED_N
14 NIC_LINK_LED_N
15 GND
16 GND
15 GND
16 GND
5.5.3 IDE
Connector
The server board provides one legacy IDE ATA100 40-pin connector (J2J2). The pin-out is
defined in the following table.
defined in the following table.
Table 25. IDE 40-pin Connector Pin-out (J2J2)
Pin
Signal Name
Pin
Signal Name
1 ESB_PLT_RST_IDE_N 2 GND
3 RIDE_DD_7
3 RIDE_DD_7
4 RIDE_DD_8
5 RIDE_DD_6
6 RIDE_DD_9
Revision
1.2
Intel order number: D41763-003
60