Intel cpb4612 User Manual
8
Access Controller (MAC) and the physical layer (PHY) interface combined into a single component solution.
Both Ethernet Channels are directed to the rear connector at J3 for PICMG 2.16 support.
Both Ethernet Channels are directed to the rear connector at J3 for PICMG 2.16 support.
The "Ethernet
"
topic in
Appendix D contains links to the datasheets for the Ethernet devices used on the
cPB-4612.
1.3.11 10/100 Ethernet Interface
The cPB-4612 supports one 10/100 Base-TX Ethernet interface. The Intel 82559EM Ethernet controller
provides this interface. The NIC address programmed into the controller is located on labels on the board.
Link and activity LED signals are on the front panel at the RJ-45 connector.
provides this interface. The NIC address programmed into the controller is located on labels on the board.
Link and activity LED signals are on the front panel at the RJ-45 connector.
The "Ethernet
"
topic in
Appendix D contains links to the datasheets for the Ethernet devices used on the
cPB-4612.
1.3.12 IDE Hard Drive
The cPB-4612 w/IDE supports an onboard ATA/100 2.5” IDE interface. This can be used to connect a 2.5”
hard drive. The IDE interface is implemented using Intel’s 6300ESB I/O Controller Hub (ICH). Note that the
onboard 2.5” IDE connector is not present on versions of the board that support the 33MHz/32 bit PMC site.
hard drive. The IDE interface is implemented using Intel’s 6300ESB I/O Controller Hub (ICH). Note that the
onboard 2.5” IDE connector is not present on versions of the board that support the 33MHz/32 bit PMC site.
All versions of the cPB-4612 supports a second ATA/100 IDE interface through the CompactPCI J5
connector. The IDE interface is implemented using Intel’s 6300ESB I/O Controller Hub (ICH).
connector. The IDE interface is implemented using Intel’s 6300ESB I/O Controller Hub (ICH).
All versions of the cPB-4612 supports a Serial ATA/150 interface through the CompactPCI J5 connector.
The IDE interface is implemented using Intel’s 6300ESB I/O Controller Hub (ICH).
The IDE interface is implemented using Intel’s 6300ESB I/O Controller Hub (ICH).
Both the 2.5” IDE drive connector and 33Mhz/32bit PMC site cannot both be present at the same time, since
they are in the same physical space on the board. Which one is populated depends on the version of the
board.
they are in the same physical space on the board. Which one is populated depends on the version of the
board.
See Chapter 6, "IDE Controller", for more information.
1.3.13 Serial I/O
The cPB-4612 provides support for two RS-232 compatible serial ports. COM1 is accessible at the
faceplate through a 9-pin DSUB connector. This port is typically used for test access. COM2 is available at
the J5 Rear Panel I/O connector.
faceplate through a 9-pin DSUB connector. This port is typically used for test access. COM2 is available at
the J5 Rear Panel I/O connector.
The serial port interface is implemented using Intel’s 6300ESB I/O Controller Hub (ICH).
1.3.14 Interrupts
Two enhanced, 8259-style interrupt controllers provide the cPB-4612 with a total of 15 interrupt inputs.
Interrupt controller features include support for:
Interrupt controller features include support for:
• Level-triggered and edge-triggered inputs
• Individual input masking
• Fixed and rotating priorities
Interrupt sources include:
• Counter/Timers
• Serial
I/O
• Keyboard
• Floppy
disk
• IDE
interface