Fujitsu FR81 User Manual

Page of 490
CM71-00105-1E
FUJITSU MICROELECTRONICS LIMITED
117
FR81 Family
CHAPTER 7  DETAILED EXECUTION INSTRUCTIONS
7.7
7.7
ADDN2 (Add Immediate Data to Destination Register)
Adds the result of the higher 28 bits of 4-bit immediate data with minus extension (-16
to -1) to word data in Ri, stores the results in Ri without changing flag settings.
Assembler Format
ADDN2   #i4, Ri
Operation
Ri + extn(i4) 
→ Ri
Flag Change
N, Z, V, C: Unchanged.
Classification
Add/Subtract Instruction, Instruction with delay slot
Execution Cycles
1 cycle
Instruction Format
N
Z
V
C
-
-
-
-
MSB
LSB
1
0
1
0
0
0
0
1
i4
Ri