Fujitsu FR81S User Manual
CHAPTER 25: 16-BIT OUTPUT COMPARE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 16-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
8
4.1.1. Output Compare Buffer Registers (OCCPB0 to
OCCPB5)/Output Compare Registers (OCCP0 to
OCCP5)
OCCP5)
The bit configuration of the output compare buffer registers / the output compare registers is
shown below.
The output compare buffer register (OCCPB) is a 16-bit buffer register for the output compare register
(OCCP).
The output compare register (OCCP) is a 16-bit register to be used for comparison with the count value of the
16-bit free-run timer.
Both the OCCPB and OCCP registers are located at the same address.
•
OCCPB0,2,4: Address 124C
H
, 1254
H
, 125C
H
(Access: Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
OP15
OP14
OP13
OP12
OP11
OP10
OP09
OP08
Initial value
0
0
0
0
0
0
0
0
Attribute
W
W
W
W
W
W
W
W
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
OP07
OP06
OP05
OP04
OP03
OP02
OP01
OP00
Initial value
0
0
0
0
0
0
0
0
Attribute
W
W
W
W
W
W
W
W
[bit15 to bit0] OP15 to OP00: Compare value buffer bits
OP15 to OP00
Function
Compare value buffer
⋅
The output compare buffer register is a buffer register for the output compare register (OCCP). If the
buffer function is disabled (BUF0: bit2 = 1 in the compare control register (OCS)) or the free-run timer
stops, the value of the output compare buffer register will be immediately transferred to the output
compare register. If the buffer function is enabled (BUF0: bit2 = 0 in the compare control register
(OCS)), the value will be transferred to the output compare register when a compare clear match or 0 is
detected in accordance with the transfer selection bit (BTS0:bit2) in the compare control register (OCS).
Notes:
When accessing this register, use a half-word or word access instruction.
Do not use a read-modify-write instruction when accessing this register.
MB91520 Series
MN705-00010-1v0-E
963