Fujitsu FR81S User Manual
CHAPTER 26: 16-BIT INPUT CAPTURE
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : 16-BIT INPUT CAPTURE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
18
5.3. Notes on Using the 16-bit Input Capture
This section explains the notes on using the 16-bit input capture.
If the input capture pin (IN) level is changed during the period from the bit setting of ICP1/ICP0 of the
input capture state control register (ICS01) to the processing of an interrupt routine, the ICP1/ICP0 effective
edge indication bits (IEI1 and IEI0 of ICS01 register) indicate the latest edge detected.
⋅
For ch.2, 3, the same notes as ch.0,1 are required.
Input capture register
The input capture register value is undefined after a reset.
Reading from the input capture register must be performed in 16-bit or 32-bit access.
Read-modify-write
When reading is performed using a read-modify-write instruction, ICP1 and ICP0 of the input capture state
control register (ICS01) are read as "1".
⋅
For ch.2, 3, the same notes as ch.0,1 are required.
Notes on interrupts
Before the input capture state control register (ICS) interrupt request enable bits (ICE1/ICE0) are set to "1",
be sure to clear the interrupt flags (ICP1/ICP0).
MB91520 Series
MN705-00010-1v0-E
1007