Fujitsu FR81S User Manual
CHAPTER 27: UP/DOWN COUNTER
6. Operation and Setting Procedure Examples
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : UP/DOWN COUNTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
21
6. Operation and Setting Procedure Examples
This section explains the operation of the up/down counter. An example is also given to set
operating state.
operating state.
Overview
Counter mode
Depending on the setting, the up/down counter can be used as a 16-bit up/down counter or an 8-bit up/down
counter.
counter.
Set the counter mode in the M16E bit in the counter control register (CCR).
· 8-bit mode (M16E=0)
Only the up/down count register low-order bit (UDCRL) is used. Write the reload and compare values
only to the reload compare register low-order bit (RCRL) using byte access.
only to the reload compare register low-order bit (RCRL) using byte access.
· 16-bit mode (M16E=1)
Both the high-order and low-order bytes of the up/down count register (UDCR) are used. Write the
reload and compare values to the reload compare register (RCR) using half-word access.
reload and compare values to the reload compare register (RCR) using half-word access.
Operating mode
One of the following three modes (four types) can be selected as the operating mode of the up/down counter
using the CMS1 and CMS0 bits of the counter control register (CCR).
using the CMS1 and CMS0 bits of the counter control register (CCR).
· Timer mode (CMS1, CMS0=00)
The counter decrements from a preset value in synchronization with the count clock.
The count clock is generated by dividing the peripheral clock (PCLK) by 2 or 8 using the prescaler.
· Up/down count mode (CMS1, CMS0=01)
The counter increments or decrements based on signals supplied from the external signal input pin.
· Phase difference count mode (multiply-by-two) (CMS1, CMS0=10)/Phase difference count mode
(multiply-by-four) (CMS1, CMS0=11)
The counter increments or decrements based on phase differences of signals supplied from the external
signal input pin. This mode is suitable for counting of encoders such as motors because it enables
high-precision counting of rotation angles and number of rotations and detection of the rotation
direction by entering the encoder A-phase to the AIN pin, B-phase to the BIN pin, and Z-phase to the
ZIN pin.
signal input pin. This mode is suitable for counting of encoders such as motors because it enables
high-precision counting of rotation angles and number of rotations and detection of the rotation
direction by entering the encoder A-phase to the AIN pin, B-phase to the BIN pin, and Z-phase to the
ZIN pin.
Available Functions
Reload/compare functions
For the 8/16-bit up/down counter, the reload and compare functions can be enabled and disabled using the
RLDE and UCRE bits of the counter control register (CCR).
RLDE and UCRE bits of the counter control register (CCR).
· Reload function
When an underflow occurs during countdown, the value set in the reload compare register (RCR) is
reloaded and counting down is restarted. For the operations, see "
reloaded and counting down is restarted. For the operations, see "
■ Counting" in "6.1. Operation in
Timer Mode".
· Compare function
If the up/down counter value matches the value set in the reload compare register (RCR) (compare
result match) and further counting up is attempted, the value of the up/down counter is cleared to
"0000
result match) and further counting up is attempted, the value of the up/down counter is cleared to
"0000
H
" and counting up is restarted. For the operations, see "
■ Counting" in "6.2. Operation in
Up/down Count Mode".
This function is not available in timer mode.
This function is not available in timer mode.
MB91520 Series
MN705-00010-1v0-E
1028