Fujitsu FR81S User Manual
CHAPTER 32: LOW-VOLTAGE DETECTION (EXTERNAL
LOW-VOLTAGE DETECTION)
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : LOW-VOLTAGE DETECTION (EXTERNAL LOW-VOLTAGE DETECTION)
FUJITSU SEMICONDUCTOR CONFIDENTIAL
8
4.2. External Low-Voltage Detection Fall Detection
Register : LVD5F (Low-Voltage Detect external 5v Fall
register)
register)
The bit configuration of the external low-voltage detection fall detection register (LVD5F) is
explained.
This register is used in order to clear the low-voltage detection reset flag, etc.
LVD5F : Address 0585
H
(Access: Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
LVD5F_PD
LVD5F_SEL[3:1]
LVD5F_OE LVD5F_SEL[0] LVD5F_RI
LVD5F_F
Initial value
0
0
0
0
0
0
0
1
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R(RM1),W
[bit7] LVD5F_PD (Low Voltage Detect external 5v Fall Power Down): External power supply fall
power down setting
This bit is used in order to set whether to detect a fall in external voltage or not.
LVD5F_PD
External power supply fall power down setting
0
Invalid (Performs detection)
1
Valid (Stops detection)
* This bit is initialized by only power-on reset.
Note:
Set detection enable (OE = 0) after 100 µs, if this bit sets the status of power-down enable to disable
(operation start). If set it before 100 µs, some detection flag setting will be occur.
[bit6 to bit4, bit2] LVD5F_SEL (Low Voltage Detect external 5v Fall SELect): External fall detection
voltage setting
These bits are the selection signal for a detection level of external voltage fall detection.
LVD5F_SEL[3:0]
External power supply fall detection voltage setting
0000
2.80V ±8%
0001
3.00V ±8%
0010
3.20V ±8%
0011
3.60V ±8%
0100
3.70V ±8%
0101
3.80V ±8%
MB91520 Series
MN705-00010-1v0-E
1159