Fujitsu FR81S User Manual
CHAPTER 3: CPU
3. CPU Operating Description
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CPU
FUJITSU SEMICONDUCTOR CONFIDENTIAL
8
3.1.1. Reset State
The reset state is shown below.
The reset state is the state when the CPU is being reset. Resets consist of two levels: initialize level and
reset level. When an initialize level reset is issued, everything in the chip is initialized. For the reset level,
others exclusive of the debug control functions, clocks, and reset control functions are initialized.
MB91520 Series
MN705-00010-1v0-E
105