Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
5. Operation of UART
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
149
5.2.1.
Transmission/Reception Data Format
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The transmission/reception data always starts from the start bit and after the transmission/reception of
data have taken place for the specified data bit length, ends at 1-bit or more length of stop bit.
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The direction of data transfer (LSB first or MSB first) is determined by the BDS bit of the serial mode
register (SMR). If an operation with parity, the parity bit will always be placed between the last data bit
and the first stop bit.
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In operation mode 0 (normal mode), you can select whether to use parity.
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In operation mode 1 (multiprocessor mode), the parity will not be added, instead AD bits will be added.
An example of transmission/reception data format (operation modes 0, 1) is shown in Figure 5-6:
Figure 5-6 Example of Transmission/Reception Data Format (Operation Modes 0, 1)
［operatin mode 0］
［operation mode 1］
ST D0 D1 D2 D3 D4 D5 D6 D7 SP1 SP2
ST D0 D1 D2 D3 D4 D5 D6 D7 SP1
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP1 SP2
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP1
ST D0 D1 D2 D3 D4 D5 D6 SP1 SP2
ST D0 D1 D2 D3 D4 D5 D6 SP1
ST D0 D1 D2 D3 D4 D5 D6 P SP1 SP2
ST D0 D1 D2 D3 D4 D5 D6 P SP1 SP2
ST D0 D1 D2 D3 D4 D5 D6 P SP1
ST D0 D1 D2 D3 D4 D5 D6 D7 AD SP1 SP2
ST D0 D1 D2 D3 D4 D5 D6 D7 AD SP1
ST D0 D1 D2 D3 D4 D5 D6 AD SP1 SP2
ST D0 D1 D2 D3 D4 D5 D6 AD SP1
ST ： Start bit
SP ： Stop bit
P : Parity bit
AD : Address/data bit
D : Data bit
SP ： Stop bit
P : Parity bit
AD : Address/data bit
D : Data bit
Without P
With P
With P
Without P
8 bit data
7 bit data
8 bit data
7 bit data
MB91520 Series
MN705-00010-1v0-E
1462