Fujitsu FR81S User Manual
CHAPTER 3: CPU
9. Reset and EIT Processing
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CPU
FUJITSU SEMICONDUCTOR CONFIDENTIAL
23
Interruption Factor
Interrupt Vector
Number
Interrupt
Level
Offset
Address at
TBR Initial
Value
Decimal
Hexa
decimal
Peripheral interrupt #28
44
2C
ICR28
0x34C
0x000FFF4C
Peripheral interrupt #29
45
2D
ICR29
0x348
0x000FFF48
Peripheral interrupt #30
46
2E
ICR30
0x344
0x000FFF44
Peripheral interrupt #31
47
2F
ICR31
0x340
0x000FFF40
Peripheral interrupt #32
48
30
ICR32
0x33C
0x000FFF3C
Peripheral interrupt #33
49
31
ICR33
0x338
0x000FFF38
Peripheral interrupt #34
50
32
ICR34
0x334
0x000FFF34
Peripheral interrupt #35
51
33
ICR35
0x330
0x000FFF30
Peripheral interrupt #36
52
34
ICR36
0x32C
0x000FFF2C
Peripheral interrupt #37
53
35
ICR37
0x328
0x000FFF28
Peripheral interrupt #38
54
36
ICR38
0x324
0x000FFF24
Peripheral interrupt #39
55
37
ICR39
0x320
0x000FFF20
Peripheral interrupt #40
56
38
ICR40
0x31C
0x000FFF1C
Peripheral interrupt #41
57
39
ICR41
0x318
0x000FFF18
Peripheral interrupt #42
58
3A
ICR42
0x314
0x000FFF14
Peripheral interrupt #43
59
3B
ICR43
0x310
0x000FFF10
Peripheral interrupt #44
60
3C
ICR44
0x30C
0x000FFF0C
Peripheral interrupt #45
61
3D
ICR45
0x308
0x000FFF08
Peripheral interrupt #46
62
3E
ICR46
0x304
0x000FFF04
Delay interrupt
63
3F
ICR47
0x300
0x000FFF00
System reserved (For REALOS use)
64
40
-
0x2FC
0x000FFEFC
System reserved (For REALOS use)
65
41
-
0x2F8
0x000FFEF8
For INT instruction use
66
42
0x2F4
0x000FFEF4
|
|
-
|
|
255
FF
0x000
0x000FFC00
MB91520 Series
MN705-00010-1v0-E
120