Fujitsu FR81S User Manual
CHAPTER 44: 12-BIT A/D CONVERTER
2. Features
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
5
2.1. Function of A/D Activation Compare
The function of A/D activation compare is explained.
Analog input control
This function can enable/disable MAX 48 channels of analog inputs with the A/D converter of 2 units.
Activation channel
It performs operation for A/D activation request control and A/D conversion data storage with each
activation channel.
The A/D activation channel corresponds to each unit of 12-bit A/D converter. The correspondence is as
follows.
Table 2-1 Channel allocation of each unit
Unit 0
Unit 1
MB91F52xB
ch.0, ch.1, ch.7, ch.10, ch.11, ch.14 to ch.17,
ch.22, ch.27, ch.28, ch.31
ch.32, ch.34, ch.35, ch.37, ch.38,
ch.40 to ch.47
MB91F52xD
ch.0, ch.1, ch.7, ch.10, ch.11, ch.14 to ch.17,
ch.22, ch.26, ch.27, ch.28, ch.31
ch.32 to ch.47
MB91F52xF
ch.0, ch1, ch7, ch9 to ch.19, ch.22, ch.23,
ch.26 to ch.29, ch.31
ch.32 to ch.47
MB91F52xJ
ch.0, ch.1, ch.7, ch.9, ch.10 to ch.31
ch.32 to ch.47
MB91F52xK
ch.0 to ch.31
ch.32 to ch.47
MB91F52xL
ch.0 to ch.31
ch.32 to ch.47
Each activation channels is composed of the following register.
Compare buffer register / Compare register
A/D activation trigger control status register
A/D data register
A/D activation trigger extend control register
Range compare control status register
Range compare threshold over flag register
Range compare flag register
Activation channel conversion count setting register
Activation channel conversion count completion flag register
A/D activation request
Each activation channel issues an A/D activation request by one of the following methods: software,
external trigger (falling), reload timer (rising), compare match, and PPG. A given activation channel
cannot reissue an A/D activation request during A/D conversion that was initiated by that channel.
For software activation, external trigger, reload timer, and PPG activation, any activation channel can be
selected.
Compare match activation is such that an A/D activation request is issued when the 16-bit free-run timer
value matches the value of the compare register for an activation channel. The free-run timer value to be
used is selected when a free-run timer is selected and is supplied to each activation channel. This can be
set at the free-run timer select register (FRS2 to FRS7). Please refer to "Free-run timer select register:
FRS" of "CHAPTAR: 16-BIT FREE-RUN TIMER" for details.
If compare match activation is in effect, an A/D activation request is issued when the free-run timer
value matches the compare register value provided that the 16-bit free-run timer only counts up, only
counts down, or counts up and down.
For each activation channel, either single mode or repeat mode can be specified as the activation request
method.
In single mode, one activation request is issued when one activation factor is encountered. One sequence
of A/D conversion is performed and the activation request is reset when the A/D conversion
completions.
In repeat mode, activation requests are issued in succession as triggered by one activation factor. A/D
conversion is performed repeatedly and the activation request continues its effect as long as repeat mode
prevails.
MB91520 Series
MN705-00010-1v0-E
1808