Fujitsu FR81S User Manual
CHAPTER 3: CPU
10. Memory Protection Function (MPU)
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CPU
FUJITSU SEMICONDUCTOR CONFIDENTIAL
50
10.4.5.
Memory Protection Operation by Delay Slot
The memory protection operation by a delay slot is shown.
The instruction arranged in the delay slot is processed as 16-bit. Therefore, the exception is generated as an
illegal instruction exception (instruction that cannot be arranged in the delay slot) even if there are an
instruction access protection violation factor and an instruction access error factor in the lower 16-bit by
arranging 32-bit instruction in the delay slot.
MB91520 Series
MN705-00010-1v0-E
147