Fujitsu FR81S User Manual
CHAPTER 44: 12-BIT A/D CONVERTER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
72
5.2.1. A/D activation
The A/D activation is explained.
The activation is requested either the A/D converter of two units. The activation request can be generated at
each analog channel (MAX 48 channels).
The activation request signal is generated to the A/D activation arbitration with either the software, the
external trigger (falling), the reload timer (rising), the compare match (When the free-run timer is
corresponding to the compare register value) or PPG. There are three A/D activation request signals, either
"Software activation request ", "External trigger/reload timer/PPG activation request " or "Compare match
activation request " becomes active in each activation channel.
The activation request is cleared by completing a corresponding channel the A/D conversion, and the
conversion data is stored in the A/D data register. In that case, the interrupt can be generated.
Even if the activation factor is received in the activation request, the activation request is not reactivated in
the activation channel.
The activation channel is allotted to two unit A/D converter. The allotment of each unit is as shown in
the table below.
Table 5-4 Channel allocation of each unit
Unit 0
Unit 1
MB91F52xB
ch.0, ch.1, ch.7, ch.10, ch.11, ch.14 to ch.17,
ch.22, ch.27, ch.28, ch.31
ch.32, ch.34, ch.35, ch.37, ch.38,
ch.40 to ch.47
MB91F52xD
ch.0, ch.1, ch.7, ch.10 to ch.12, ch.14 to
ch.17, ch.22, ch.26, ch.27, ch.28, ch.31
ch.32 to ch.47
MB91F52xF
ch.0, ch1, ch7, ch9 to ch.19, ch.22, ch.23,
ch.26 to ch.29, ch.31
ch.32 to ch.47
MB91F52xJ
ch.0, ch.1, ch.7, ch.9, ch.10 to ch.31
ch.32 to ch.47
MB91F52xK
ch.0 to ch.31
ch.32 to ch.47
MB91F52xL
ch.0 to ch.31
ch.32 to ch.47
MB91520 Series
MN705-00010-1v0-E
1875