Fujitsu FR81S User Manual
CHAPTER 49: BUS DIAGNOSIS FUNCTION
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : BUS DIAGNOSIS FUNCTION
FUJITSU SEMICONDUCTOR CONFIDENTIAL
15
[bit13, bit12] Undefined
"0" is always read. Writing does not affect operation.
[bit11] CEN: Control error
Control error setting bit
If this bit is "0", the control parity is properly generated.
If this bit is "1", a control parity error occurs.
Note:
For RBEN=0, APBEN=0, and AHBEN=0, this bit is invalid. Under such condition, it will be the same
behavior as when "0" is set to the bit.
[bit10] RBEN: Rbus parity error generation enable
This bit enables the generation of a Rbus (PCLK1) parity error.
If this bit is "0", the Rbus parity is generated as correct one (odd parity).
If this bit is "1", the Rbus parity is generated as even parity so that an error occurs.
Note:
For DEN[3:0]= 0000, AEN[3:0]= 0000, CEN= 0, this bit is invalid. Under such condition, it will be the
same behavior as when "0" is set to the bit.
[bit9] APBEN: APB parity error generation enable
This bit enables the generation of an APB (PCLK1) parity error.
If this bit is "0", the APB parity is generated as correct one (odd parity).
If this bit is "1", the APB parity is generated as even parity so that an error occurs.
Note:
For DEN[3:0]= 0000, AEN[3:0]= 0000, CEN= 0, this bit is invalid. Under such condition, it will be the
same behavior as when "0" is set to the bit.
[bit8] Reserved
Always write "0".
MB91520 Series
MN705-00010-1v0-E
2108