Fujitsu FR81S User Manual
CHAPTER 9: GENERATION AND CLEARING OF DMA
TRANSFER REQUESTS
1. Overview
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: GENERATION AND CLEARING OF DMA TRANSFER REQUESTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
3
1. Overview
This section explains the overview of the generation and clearing of DMA transfer requests.
This product can activate DMA transfer using interrupt requests from peripheral functions. Registers used to
select interrupt requests that activate DMA transfer are provided for each DMA controller (DMAC) channel.
If multiple interrupt requests are assigned to one interrupt vector number, it is also necessary to specify
what interrupt request flag is to be cleared by the DMA controller (DMAC).
DMA controller (DMAC) registers allow DMA transfer request generation factors (transfer request sources)
to be set on interrupt requests from peripheral functions. The interrupt requests to be used can be selected
by specifying the value corresponding to the interrupt vector number.
MB91520 Series
MN705-00010-1v0-E
348