Fujitsu FR81S User Manual
CHAPTER 9: GENERATION AND CLEARING OF DMA
TRANSFER REQUESTS
3. Configuration
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: GENERATION AND CLEARING OF DMA TRANSFER REQUESTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
7
3. Configuration
This section explains the configuration of the generation and clearing of DMA transfer
requests.
Figure 3-1 Block Diagram
ch.
15
ch.
1
Int
er
rupt
reques
ts
vec
tor
num
ber
16
to
63
IOS IOE
D
MA
C
ch.
0
to
ch.
15
trans
fer
reques
ts
ch.
0
DM
A
C
trans
fer
c
om
plet
ion
ch.
0
to
ch.
15
Reverse the interrupt vector
number of which DMA
transfer completed.
Reverse peripheral
ICSEL
IOR
R
In
te
rrupt
c
lea
ring
reques
ts
to
eac
h
pe
riphe
ra
ls
MB91520 Series
MN705-00010-1v0-E
352