Fujitsu FR81S User Manual
CHAPTER 11: I/O PORTS
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : I/O PORTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
34
4.6.11.
Extended Port Function Register 83 : EPFR83
The bit configuration of extended port function register 83 is shown.
This register is used to select up/down counter pins. ( I/O relocation )
EPFR83 : Address 01CB
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved ZIN1E
BIN1E
AIN1E
ZIN0E
BIN0E
AIN0E
Initial value
1
0
0
0
0
0
0
0
Attribute R1,WX
R/W
R/W
R/W
R/W
R/W
R/W
R/W
[bit6] ZIN1E
:
[bit5] BIN1E
:
[bit4] AIN1E
:
[bit3, bit2] ZIN0E [1:0]
:
[bit1] BIN0E
:
[bit0] AIN0E
:
AINnE (n=0,1)
Operation
00
Input from the AIN0_0 pin (Initial value)
01
Input from the AIN0_1 pin
Same BIN0E, BIN1E, ZIN1E
ZINnE[1:0] (n=0)
Operation
00
Input from the ZIN0_0 pin (Initial value)
01
Input from the ZIN0_1 pin
1x
Input from the ZIN0_2 pin
MB91520 Series
MN705-00010-1v0-E
429