Fujitsu FR81S User Manual
CHAPTER 17: PPG
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: PPG
FUJITSU SEMICONDUCTOR CONFIDENTIAL
16
4.1. PPG Control Status Register : PCN0 to PCN 47
The bit configuration of PPG control status register is shown.
The PPG control status register (PCN) controls the operation and status of the PPG.
PPG control status register (PCN): Address Base_addr + 00
H
(Access: Byte,
Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
CNTE
STGR
MDSE
RTRG
CKS1
CKS0
PGMS
OWFS
Initial value
0
0
0
0
0
0
0
0
Attribute
R/W
R0/W
R/W
R/W
R/W
R/W
R/W
R/W
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
EGS1
EGS0
IREN
IRQF
IRS1
IRS0
Reserved OSEL
Initial value
0
0
0
0
0
0
0
0
Attribute
R/W
R/W
R/W
R(RM1)/W
R/W
R/W
R/W0
R/W
* The each bits of the PPG control status register (PCN), except for Bit13 MDSE: mode selection bit and
Bit8 OWFS: PPG output waveform selection bit, will become effective immediately by writing in the
register.
[bit15] CNTE : Timer operation enable bit
CNTE
Explanation
0
The timer operation is stopped.
1
The timer operation is enabled.
This bit is the timer operation enable bit.
If this bit is set to "0", the PPG operation is stopped.
If this bit is set to "1", the PPG operation is enabled.
[bit14] STRG : Software trigger bit
STRG
Explanation
0
The operation is not influenced by the value written to this bit
(The read value is always "0").
1
The PPG is activated by a software trigger that is generated independent of the
external trigger (at the TRG pin). This trigger is not influenced by the trigger input
edge selection bits (EGS1, EGS0).
This bit is the software trigger bit.
If this bit is set to "0", the operation is not influenced by the value written to this bit.
If this bit is set to "1", The PPG is activated by a software trigger that is generated independent of the
external trigger (at the TRG pin). This trigger is not influenced by the trigger input edge selection bits
(EGS1, EGS0).
MB91520 Series
MN705-00010-1v0-E
557