Fujitsu FR81S User Manual
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
42
Figure 5-2 Wiring Diagram of Each I/O Mode (2)
TIOB n
TIOAn
TIOB m
TIOAm
ch.n
ch.m
ECK
TGIN
TIN
TOUT
ECK
TGIN
TIN
TOUT
COUT
Block diagram for I/O mode 5 (simultaneous software activation mode)
Block diagram for I/O mode 6 (software activation timer activation/stop mode)
Block diagram for I/O mode 7 (timer activation mode)
TIOB n
TIOAn
TIOB m
TIOAm
ch.n
ch.m
ECK
TGIN
TIN
TOUT
ECK
Base timer
Base timer
TGIN
TIN
TOUT
Software activation
signal (SSSRn bit)
Software activation
signal (SSSRm bit)
TIOB n
TIOAn
TIOB m
TIOAm
ch.n
ch.m
ECK
TGIN
TIN
TOUT
DTRG
ECK
TGIN
TIN
TOUT
COUT
Software activation
signal (SSSRm bit)
Base timer
Base timer
Base timer
Base timer
m
:c
h.
0
n:
ch.
1
MB91520 Series
MN705-00010-1v0-E
675