Fujitsu FR81S User Manual
CHAPTER 22: 32-BIT OUTPUT COMPARE
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
17
5.3. Output Compare Operation Timing
This section shows the output compare operation timing.
With the use of two pairs of compare registers, the output level can be changed. (For CMOD = "1")
The output compare can invert the output as well as generate an interrupt when the free-run timer value
matches the specified compare register value and a compare match signal is generated. The output invert
timing on compare match is synchronized with the counter count timing.
MB91520 Series
MN705-00010-1v0-E
854