Fujitsu FR81S User Manual
CHAPTER 22: 32-BIT OUTPUT COMPARE
7. Q&A
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
24
7.2. How Can I Set the Compare Mode? (Example with
OCU7)
This section shows how to set the compare mode.
Set with the compare mode bit (OCSH67:CMOD)
Operation
Compare mode bit
To invert the OCU7 pin output when the free-run timer value matches the
compare register 7 (OCCP7)
Set (OCSH67:CMOD) to
"0".
To invert the OCU7 pin output when the free-run timer value matches either
the compare register 6 (OCCP6) or the compare register 7 (OCCP7)
Set (OCSH67:CMOD) to
"1".
Regardless of the CMOD bit, the operation is as follows:
⋅
Regardless of the compare mode bit (OCSH67:CMOD) setting, the OCU6 output is inverted when the
free-run timer value matches the compare register 6 (OCCP6).
MB91520 Series
MN705-00010-1v0-E
861