Fujitsu FR81S User Manual
CHAPTER 28: REAL-TIME CLOCK(RTC)
7. Q&A
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: REAL-TIME CLOCK(RTC)
FUJITSU SEMICONDUCTOR CONFIDENTIAL
27
7.9. What Are Interrupt Related Registers?
This section explains interrupt related registers.
Setting of RTC interrupt vector and the RTC interrupt level
The following table shows the relationship between interrupt levels and interrupt vectors.
For details on interrupt levels and interrupt vectors, see "CHAPTER: INTERRUPT CONTROL
(INTERRUPT CONTROLLER)".
Interrupt vector (default)
Interrupt level setting bit(ICR[4:0])
#37 (0FFF68
H
)
Interrupt level register ICR21 (00455
H
)
The interrupt request flags (INT0, INT1, INT2, INT3, INT4) are not automatically cleared. Therefore, use
software to clear the flags prior to restoration from interrupt processing. (Write "0" to INT0, INT1, INT2,
INT3, INT4 bits)
MB91520 Series
MN705-00010-1v0-E
1066