IBM EM78P259N/260N User Manual
EM78P259N/260N
8-Bit Microprocessor with OTP ROM
Product Specification
(V1.2) 05.18.2007
• 9
(This specification is subject to change without further notice)
6.1.6 R5 ~ R6 (Port 5 ~ Port 6)
R5 & R6
are I/O registers
The upper 2 bits of R5 are fixed to “0” (if EM78P259N is selected).
Only the lower 6 bits of R5 are available (this applies to EM78P259N only as
EM78P260N can use all the bits)
EM78P260N can use all the bits)
6.1.7 R7 (Port 7)
Bit
7
6
5
4
3
2
1
0
EM78P259N/260N
‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ I/O
ICE259N
C3 C2 C1 C0
RCM1
RCM0
‘0’ I/O
Note:
R7 is an I/O register
For EM78P259N/260N, only the lower 1 bit of R7 is available.
Bit 7 ~ Bit 2:
[With EM78P259N/260N]:
Unimplemented, read as ‘0’.
[With Simulator (C3~C0, RCM1,
& RCM0)]: are IRC calibration bits in IRC oscillator
mode. Under IRC oscillator mode of ICE259N simulator,
these are the IRC mode selection bits and IRC calibration bits.
these are the IRC mode selection bits and IRC calibration bits.
Bit 7 ~ Bit 4 (C3 ~ C0):
Calibrator of internal RC mode
C3
C2
C1
C0
Frequency (MHz)
0 0 0 0 (1-36%)
x
F
0 0 0 1 (1-31.5%)
x
F
0 0 1 0 (1-27%)
x
F
0 0 1 1 (1-22.5%)
x
F
0 1 0 0 (1-18%)
x
F
0 1 0 1 (1-13.5%)
x
F
0 1 1 0 (1-9%)
x
F
0 1 1 1 (1-4.5%)
x
F
1 1 1 1 F
(default)
1 1 1 0 (1+4.5%)
x
F
1 1 0 1 (1+9%)
x
F
1 1 0 0 (1+135%)
x
F
1 0 1 1 (1+18%)
x
F
1 0 1 0 (1+22.5%)
x
F
1 0 0 1 (1+27%)
x
F
1 0 0 0 (1+31.5%)
x
F
1. Frequency values shown are theoretical and taken at an instance of
a high frequency mode. Hence, frequency values are shown for
reference only. Definite values depend on the actual process.
reference only. Definite values depend on the actual process.
2. Similar way of calculation is also applicable to low frequency mode.