IBM EM78P259N/260N User Manuals

Table of Contents

• Contents

  3
  • 1 General Description

    7
  • 2 Features

    7
  • 3 Pin Assignment

    8
  • 4 Block Diagram

    8
  • 5 Pin Description

    9
    • 5.1 EM78P259NP/M

      9
    • 5.2 EM78P260NP/M/KM

      10
  • 6 Function Description

    11
    • 6.1 Operational Registers

      11
      • 6.1.1 R0 (Indirect Address Register)

        11
      • 6.1.2 R1 (Time Clock /Counter)

        11
      • 6.1.3 R2 (Program Counter) and Stack

        11
        • 6.1.3.1 Data Memory Configuration

          13
      • 6.1.4 R3 (Status Register)

        14
      • 6.1.5 R4 (RAM Select Register)

        15
      • 6.1.6 R5 ~ R6 (Port 5 ~ Port 6)

        15
      • 6.1.7 R7 (Port 7)

        15
      • 6.1.8 R8 (AISR: ADC Input Select Register)

        16
      • 6.1.9 R9 (ADCON: ADC Control Register)

        17
      • 6.1.10 RA (ADOC: ADC Offset Calibration Register)

        18
      • 6.1.11 RB (ADDATA: Converted Value of ADC)

        19
      • 6.1.12 RC (ADDATA1H: Converted Value of ADC)

        19
      • 6.1.13 RD (ADDATA1L: Converted Value of ADC)

        19
      • 6.1.14 RE (Interrupt Status 2 & Wake-up Control Register)

        19
      • 6.1.15 RF (Interrupt Status 2 Register)

        20
      • 6.1.16 R10 ~ R3F

        20
    • 6.2 Special Purpose Registers

      21
      • 6.2.1 A (Accumulator)

        21
      • 6.2.2 CONT (Control Register)

        21
      • 6.2.3 IOC50 ~ IOC70 (I/O Port Control Register)

        22
      • 6.2.4 IOC80 (Comparator and TCCA Control Register)

        22
      • 6.2.5 IOC90 (TCCB and TCCC Control Register)

        23
      • 6.2.6 IOCA0 (IR and TCCC Scale Control Register)

        24
      • 6.2.7 IOCB0 (Pull-down Control Register)

        26
      • 6.2.8 IOCC0 (Open-Drain Control Register)

        26
      • 6.2.9 IOCD0 (Pull-high Control Register)

        27
      • 6.2.10 IOCE0 (WDT Control & Interrupt Mask Registers 2)

        27
      • 6.2.11 IOCF0 (Interrupt Mask Register)

        28
      • 6.2.12 IOC51 (TCCA Counter)

        29
      • 6.2.13 IOC61 (TCCB Counter)

        29
      • 6.2.14 IOC71 (TCCBH/MSB Counter)

        30
      • 6.2.15 IOC81 (TCCC Counter)

        30
      • 6.2.16 IOC91 (Low Time Register)

        31
      • 6.2.17 IOCA1 (High Time Register)

        31
      • 6.2.18 IOCB1 High/Low Time Scale Control Register)

        32
      • 6.2.19 IOCC1 (TCC Prescaler Counter)

        32
    • 6.3 TCC/WDT and Prescaler

      33
    • 6.4 I/O Ports

      34
      • 6.4.1 Usage of Port 5 Input Change Wake-up/Interrupt Function

        37
    • 6.5 Reset and Wake-up

      37
      • 6.5.1 Reset and Wake-up Operation

        37
        • 6.5.1.1 Wake-Up and Interrupt Modes Operation Summary

          40
        • 6.5.1.2 Register Initial Values after Reset

          42
        • 6.5.1.3 Controller Reset Block Diagram

          46
      • 6.5.2 The T and P Status under STATUS (R3) Register

        47
    • 6.6 Interrupt

      47
    • 6.7 Analog-to-Digital Converter (ADC)

      50
      • 6.7.1 ADC Control Register (AISR/R8, ADCON/R9, ADOC/RA)

        50
        • 6.7.1.1 R8 (AISR: ADC Input Select Register)

          50
        • 6.7.1.2 R9 (ADCON: AD Control Register)

          51
        • 6.7.1.3 RA (ADOC: AD Offset Calibration Register)

          52
      • 6.7.2 ADC Data Register (ADDATA/RB, ADDATA1H/RC,ADDATA1L/RD)

        53
      • 6.7.3 ADC Sampling Time

        53
      • 6.7.4 AD Conversion Time

        53
      • 6.7.5 ADC Operation during Sleep Mode

        54
      • 6.7.6 Programming Process/Considerations

        54
        • 6.7.6.1 Programming Process

          54
        • 6.7.6.2 Sample Demo Programs

          55
    • 6.8 Infrared Remote Control Application/PWM WaveformGeneration

      57
      • 6.8.1 Overview

        57
      • 6.8.2 Function Description

        58
      • 6.8.3 Programming the Related Registers

        60
    • 6.9 Timer/Counter

      62
      • 6.9.1 Overview

        62
      • 6.9.2 Function Description

        62
      • 6.9.3 Programming the Related Registers

        64
    • 6.10 Comparator

      64
      • 6.10.1 External Reference Signal

        65
      • 6.10.2 Comparator Output

        65
      • 6.10.3 Using a Comparator as an Operation Amplifier

        66
      • 6.10.4 Comparator Interrupt

        66
      • 6.10.5 Wake-up from Sleep Mode

        66
    • 6.11 Oscillator

      67
      • 6.11.1 Oscillator Modes

        67
      • 6.11.2 Crystal Oscillator/Ceramic Resonators (Crystal)

        68
      • 6.11.3 External RC Oscillator Mode

        69
      • 6.11.4 Internal RC Oscillator Mode

        70
    • 6.12 Power-on Considerations

      71
      • 6.12.1 Programmable WDT Time-out Period

        71
      • 6.12.2 External Power-on Reset Circuit

        71
      • 6.12.3 Residual Voltage Protection

        72
    • 6.13 Code Option

      73
      • 6.13.1 Code Option Register (Word 0)

        73
      • 6.13.2 Code Option Register (Word 1)

        74
      • 6.13.3 Customer ID Register (Word 2)

        75
    • 6.14 Instruction Set

      75
  • 7 Absolute Maximum Ratings

    77
  • 8 DC Electrical Characteristics

    78
    • 8.1 AD Converter Characteristics

      80
    • 8.2 Comparator (OP) Characteristics

      81
    • 8.3 Device Characteristics

      81
  • 9 AC Electrical Characteristic

    82
  • 10 Timing Diagrams

    83
• APPENDIX

  84
  • A Package Type

    84
  • B Package Information

    84
    • B.1 18-Lead Plastic Dual in line (PDIP) — 300 mil

      84
    • B.2 18-Lead Plastic Small Outline (SOP) — 300 mil

      85
    • B.3 20-Lead Plastic Shrink Small Outline (SSOP) — 209 mil

      86
    • B.4 20-Lead Plastic Dual-in-line (PDIP) — 300 mil

      87
    • B.5 20-Lead Plastic Small Outline (SOP) — 300 mil

      88
  • C Quality Assurance and Reliability

    89
    • C.1 Address Trap Detect

      89