SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

SMSC LAN9311/LAN9311i

289

Revision 1.4 (08-19-08)

 

This read/write register is used to configure the Port x PHY.

This register is re-written in its entirety by the EEPROM Loader following the release of reset
or a RELOAD command. Refer to 

 for

additional information.

Index (decimal):

0

Size:

16 bits

15

Reset (PHY_RST)
When set, this bit resets all the Port x PHY registers to their default state, 
except those marked as NASR type. This bit is self clearing.

R/W

SC

0b

14

Loopback (PHY_LOOPBACK)
This bit enables/disables the loopback mode. When enabled, transmissions 
from the switch fabric are not sent to network. Instead, they are looped back 
into the switch fabric.

If loopback is enabled during half-duplex operation, then the 
Enable Receive Own Transmit bit in the 

specified port. Otherwise, the switch fabric will ignore receive 
activity when transmitting in half-duplex mode.

R/W

0b

13

Speed Select LSB (PHY_SPEED_SEL_LSB)
This bit is used to set the speed of the Port x PHY when the 

 bit is disabled.

R/W

12

Auto-Negotiation (PHY_AN)
This bit enables/disables Auto-Negotiation. When enabled, the 

 and 

 bits are 

overridden.

R/W

11

Power Down (PHY_PWR_DWN)
This bit controls the power down mode of the Port x PHY. After this bit is 
cleared the PHY may auto-negotiate with it’s partner station. This process 
can take up to a few seconds to complete. Once Auto-Negotiation is 
complete, bit 5 (

) of the 

 will be set. 

The PHY_AN bit of this register must be cleared before setting this 
bit.

R/W

0b

10

RO

-