SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Revision 1.4 (08-19-08)

440

SMSC LAN9311/LAN9311i

 

This register contains the Buffer Manager interrupt status. The status is double buffered. All interrupts
in this register may be masked via the 

 register.

Refer to 

 for more information.

Register #:

1C21h

Size:

32 bits

31:14

RO

-

13:10

Drop Reason B
When bit 7 is set, these bits indicate the reason a packet was dropped per 
the table below:

RC

0h

9:8

Source Port B
When bit 7 is set, these bits indicate the source port on which the packet 
was dropped.

RC

00b

7

Status B Pending
When set, bits 13:8 are valid.

RC

0b

The destination address was not in the ALR table (unknown or broadcast), and 
the Broadcast Buffer Level was exceeded.

Drop on Red was set and the packet was colored Red.

There were no buffers available.

There were no memory descriptors available.

The destination address was not in the ALR table (unknown or broadcast) and 
there were no valid destination ports.

The packet had a receive error and was >64 bytes

The Buffer Drop Level was exceeded.

RESERVED

RESERVED

Drop on Yellow was set, the packet was colored Yellow and was randomly 
selected to be dropped.

RESERVED

RESERVED

RESERVED

RESERVED

RESERVED

RESERVED