SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

SMSC LAN9311/LAN9311i

439

Revision 1.4 (08-19-08)

 

This register contains the Buffer Manager interrupt mask, which masks the interrupts in the 

. All Buffer Manager interrupts are masked by setting

the Interrupt Mask bit. Clearing this bit will unmask the interrupts. Refer to 

 for more information.

Register #:

1C20h

Size:

32 bits

31:1

RO

-

0

Interrupt Mask
When set, this bit masks interrupts from the Buffer Manager. The status bits 
in the 

 are not affected.

R/W

1b