Intel 8XC251SQ User Manual
9-5
PROGRAMMABLE COUNTER ARRAY
9.3
PCA COMPARE/CAPTURE MODULES
Each compare/capture module is made up of a compare/capture register pair
(CCAPxH/CCAPxL), a 16-bit comparator, and various logic gates and signal transition selectors.
The registers store the time or count at which an external event occurred (capture) or at which an
action should occur (comparison). In the PWM mode, the low-byte register controls the duty cy-
cle of the output waveform.
(CCAPxH/CCAPxL), a 16-bit comparator, and various logic gates and signal transition selectors.
The registers store the time or count at which an external event occurred (capture) or at which an
action should occur (comparison). In the PWM mode, the low-byte register controls the duty cy-
cle of the output waveform.
The logical configuration of a compare/capture module depends on its mode of operation
(Figures 9-2 through 9-5). Each module can be independently programmed for operation in any
of the following modes:
(Figures 9-2 through 9-5). Each module can be independently programmed for operation in any
of the following modes:
•
16-bit capture mode with triggering on the positive edge, negative edge, or either edge.
•
Compare modes: 16-bit software timer, 16-bit high-speed output, 16-bit WDT (module 4
only), or 8-bit pulse width modulation.
only), or 8-bit pulse width modulation.
•
No operation.
Bit combinations programmed into a compare/capture module’s mode register (CCAPMx) deter-
mine the operating mode. Figure 9-9 provides bit definitions and Table 9-3 lists the bit combina-
tions of the available modes. Other bit combinations are invalid and produce undefined results.
mine the operating mode. Figure 9-9 provides bit definitions and Table 9-3 lists the bit combina-
tions of the available modes. Other bit combinations are invalid and produce undefined results.
The compare/capture modules perform their programmed functions when their common time
base, the PCA timer/counter, runs. The timer/counter is turned on and off with the CR bit in the
CCON register. To disable any given module, program it for the no operation mode. The occur-
rence of a capture, software timer, or high-speed output event in a compare/capture module sets
the module’s compare/capture flag (CCFx) in the CCON register and generates a PCA interrupt
request if the corresponding enable bit in the CCAPMx register is set.
base, the PCA timer/counter, runs. The timer/counter is turned on and off with the CR bit in the
CCON register. To disable any given module, program it for the no operation mode. The occur-
rence of a capture, software timer, or high-speed output event in a compare/capture module sets
the module’s compare/capture flag (CCFx) in the CCON register and generates a PCA interrupt
request if the corresponding enable bit in the CCAPMx register is set.
The CPU can read or write the CCAPxH and CCAPxL registers at any time.
9.3.1
16-bit Capture Mode
The capture mode (Figure 9-2) provides the PCA with the ability to measure periods, pulse
widths, duty cycles, and phase differences at up to five separate inputs. External I/O pins CEX0
through CEX4 are sampled for signal transitions (positive and/or negative as specified). When a
compare/capture module programmed for the capture mode detects the specified transition, it
captures the PCA timer/counter value. This records the time at which an external event is detect-
ed, with a resolution equal to the timer/counter clock period.
widths, duty cycles, and phase differences at up to five separate inputs. External I/O pins CEX0
through CEX4 are sampled for signal transitions (positive and/or negative as specified). When a
compare/capture module programmed for the capture mode detects the specified transition, it
captures the PCA timer/counter value. This records the time at which an external event is detect-
ed, with a resolution equal to the timer/counter clock period.