Intel 8XC251SQ User Manual

Index-1

#0data16,  A-3
#1data16,  A-3
#data

definition,  A-3

#data16,  A-3
#short,  A-3
8XC251SA, SB, SP, SQ,  1-1

block diagram,  2-2
on-chip peripherals,  2-3

8XC251Sx,  1-1
8XC51FX,  2-1

A15:8,  7-1

description,  13-2

A16

description,  13-2

AC flag,  5-18, 5-19, C-20
ACALL instruction,  5-15, A-24, A-26
ACC,  3-13, 3-17, 3-18, C-2, C-3, C-7
Accumulator,  3-15

in register file,  3-13
See also ACC

AD7:0,  7-1

description,  13-2

ADD instruction,  5-8, A-14
ADDC instruction,  5-8, A-14
addr11,  5-13, A-3
addr16,  5-13, A-3
addr24,  5-13, A-3
Address spaces, See Memory space, SFRs, Register 

Addresses

internal vs external,  4-9

Addressing modes,  3-8, 5-4

AJMP instruction,  5-15, A-24
ALE

caution,  11-7
description,  13-2
extending,  4-13
following reset,  11-7
idle mode,  12-4

programming and verifying nonvolatile 

memory,  14-3

ANL instruction,  5-9, 5-11

for bits,  A-23

ANL/ instruction,  5-11

for bits,  A-23

Arithmetic instructions,  5-8, 5-9

table of,  A-14, A-15, A-16

B register,  3-15, C-7

as SFR,  3-17, 3-18, C-2, C-3
in register file,  3-13

Base address,  5-4
Baud rate, See Serial I/O port, Timer 1, Timer 2
Big endien form,  5-2
Binary and source modes,  2-4, 4-13–4-15, 5-1

opcode maps,  4-14
selection guidelines,  2-4, 4-14

Bit address

addressing modes,  5-12
definition,  A-3
examples,  5-11

Bit instructions,  5-1, 5-11–5-12

addressing modes,  5-4, 5-11

bit51,  5-11, A-3
Broadcast address, See Serial I/O port
Bulletin board service (BBS),  1-7, 1-8
Bus cycles,  13-3

nonpage mode,  13-4
page mode,  13-5

Call instructions,  5-15
Capacitors

bypass,  11-2

CCAP1H–CCAP4H, CCAP1L–CCAP4L,  3-17, 3-

20, C-2, C-5, C-8

CCAPM1–4,  3-17, 3-19, 9-15, C-2, C-5, C-9

interrupts,  6-5

CCON,  3-17, 3-19, 9-14, C-2, C-5, C-10
Ceramic resonator,  11-4
CEX4:0,  7-1
CH, CL,  3-17, 3-20, C-2, C-5, C-10