Intel 8XC251SQ User Manual
4-9
DEVICE CONFIGURATION
4.5.2
Configuration Bits RD1:0
The RD1:0 configuration bits (UCONFIG0.3:2) determine the number of external address signals
and the address ranges for asserting the read signals PSEN#/RD# and the write signal WR#.
These
and the address ranges for asserting the read signals PSEN#/RD# and the write signal WR#.
These
selections
offer different ways of addressing external memory. Figures 4-5 and 4-6 show
how internal memory maps into external memory for the four values of RD1:0. Section 13.8, “Ex-
ternal Memory Design Examples,” provides examples of external memory designs for each
choice of RD1:0.
ternal Memory Design Examples,” provides examples of external memory designs for each
choice of RD1:0.
A key to the memory interface is the relationship between internal memory addresses and exter-
nal memory addresses. While the 8XC251Sx has 24 internal address bits, the number of external
address lines is less than 24 (i.e., 16, 17, or 18 depending on the values of RD1:0). This means
that reads/writes to different internal memory addresses can access the same location in external
memory.
nal memory addresses. While the 8XC251Sx has 24 internal address bits, the number of external
address lines is less than 24 (i.e., 16, 17, or 18 depending on the values of RD1:0). This means
that reads/writes to different internal memory addresses can access the same location in external
memory.
For example, if the 8XC251Sx is configured for 17 external address lines, a write to location
01:6000H and a write to location FF:6000H accesses the same 17-bit external address (1:6000H)
because A16 = 1 for both internal addresses. In other words, regions 01: and FF: map into the
same 64-Kbyte region in external memory.
01:6000H and a write to location FF:6000H accesses the same 17-bit external address (1:6000H)
because A16 = 1 for both internal addresses. In other words, regions 01: and FF: map into the
same 64-Kbyte region in external memory.
In some situations, however, a multiple mapping from internal memory to external memory does
not preclude using more than one region. For example, for a device with on-chip ROM/
OTPROM/EPROM configured for 17 address bits and with EA# = 1, an access to FF:0000H–
FF:3FFFH (16 Kbytes) accesses the on-chip ROM/OTPROM/EPROM, while an access to
01:0000H–01:3FFFH is to external memory. In this case, you could execute code from these lo-
cations in region FF: and store data in the corresponding locations in region 01: without conflict.
See Figure 4-5 and section 13.8.3, “Example 3: RD1:0 = 01, 17-bit Bus, External RAM.”
not preclude using more than one region. For example, for a device with on-chip ROM/
OTPROM/EPROM configured for 17 address bits and with EA# = 1, an access to FF:0000H–
FF:3FFFH (16 Kbytes) accesses the on-chip ROM/OTPROM/EPROM, while an access to
01:0000H–01:3FFFH is to external memory. In this case, you could execute code from these lo-
cations in region FF: and store data in the corresponding locations in region 01: without conflict.
See Figure 4-5 and section 13.8.3, “Example 3: RD1:0 = 01, 17-bit Bus, External RAM.”
4.5.2.1
RD1:0 = 00 (18 External Address Bits)
The selection RD1:0 = 00 provides 18 external address bits: A15:0 (ports P0 and P2), A16 (from
P3.7/RD#/A16), and A17 (from P1.7/CEX4/A17/WCLK). Bits A16 and A17 can select four 64-
Kbyte regions of external memory for a total of 256 Kbytes (top half of Figure 4-5). This is the
largest possible external memory space. See section 13.8.1, “Example 1: RD1:0 = 00, 18-bit Bus,
External Flash and RAM.”
P3.7/RD#/A16), and A17 (from P1.7/CEX4/A17/WCLK). Bits A16 and A17 can select four 64-
Kbyte regions of external memory for a total of 256 Kbytes (top half of Figure 4-5). This is the
largest possible external memory space. See section 13.8.1, “Example 1: RD1:0 = 00, 18-bit Bus,
External Flash and RAM.”
4.5.2.2
RD1:0 = 01 (17 External Address Bits)
The selection RD1:0 = 01 provides 17 external address bits: A15:0 (ports P0 and P2) and A16
(from P3.7/RD#/A16). Bit A16 can select two 64-Kbyte regions of external memory for a total
of 128 Kbytes (bottom half of Figure 4-5). Regions 00: and FE: (each having A16 = 0) map into
the same 64-Kbyte region in external memory. This duplication also occurs for regions 01: and
FF:
(from P3.7/RD#/A16). Bit A16 can select two 64-Kbyte regions of external memory for a total
of 128 Kbytes (bottom half of Figure 4-5). Regions 00: and FE: (each having A16 = 0) map into
the same 64-Kbyte region in external memory. This duplication also occurs for regions 01: and
FF: