Fujitsu CM71-00101-5E User Manual
187
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.90
RET (Return from Subroutine)
This is a branching instruction with no delay slot.
Branches to the address indicated by the return pointer (RP).
Branches to the address indicated by the return pointer (RP).
■
RET (Return from Subroutine)
Assembler format:
RET
Operation:
RP
→
PC
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
2 cycles
Instruction format:
Example:
RET
N
Z
V
C
–
–
–
–
MSB
LSB
1
0
0
1
0
1
1
1
0
0
1
0
0
0
0
0
PC
PC
F F F 0 8 8 2 0
8 0 0 0 A E 8 6
8 0 0 0
A E 8 6
8 0 0 0
A E 8 6
RP
RP
Before execution
After execution
Instruction bit pattern : 1001 0111 0010 0000