Fujitsu CM71-00101-5E User Manual
188
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.91
INT (Software Interrupt)
Stores the values of the program counter (PC) and program status (PS) to the stack
indicated by the system stack pointer (SSP) for interrupt processing. Writes "0" to the
"S" flag in the condition code register (CCR), and uses the "SSP" as the stack pointer
for the following steps. Writes "0" to the "I" flag (interrupt enable flag) in the "CCR" to
disable external interrupts. Reads the vector table for the interrupt vector number "u8"
to determine the branch destination address, and branches.
This instruction has no delay slot.
Vector numbers 9 to 13, 64 and 65 are used by emulators for debugging interrupts and
therefore the corresponding numbers "INT#9" to "INT#13", "INT#64", "INT#65" should
not be used in user programs.
indicated by the system stack pointer (SSP) for interrupt processing. Writes "0" to the
"S" flag in the condition code register (CCR), and uses the "SSP" as the stack pointer
for the following steps. Writes "0" to the "I" flag (interrupt enable flag) in the "CCR" to
disable external interrupts. Reads the vector table for the interrupt vector number "u8"
to determine the branch destination address, and branches.
This instruction has no delay slot.
Vector numbers 9 to 13, 64 and 65 are used by emulators for debugging interrupts and
therefore the corresponding numbers "INT#9" to "INT#13", "INT#64", "INT#65" should
not be used in user programs.
■
INT (Software Interrupt)
Assembler format:
INT #u8
Operation:
SSP – 4
→
SSP
PS
→
(SSP)
SSP – 4
→
SSP
PC + 2
→
(SSP)
"0"
→
I flag
"0"
→
S flag
(TBR + 3FC
H
– u8 × 4)
→
PC
Flag change:
N, Z, V, and C: Unchanged
S and I:
Cleared to "0".
Execution cycles: 3 + 3a cycles
Instruction format:
S
I
N
Z
V
C
0
0
–
–
–
–
MSB
LSB
0
0
0
1
1
1
1
1
u8