Fujitsu CM71-00101-5E User Manual
194
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.94
Bcc (Branch Relative if Condition Satisfied)
This branching instruction has no delay slot.
If the conditions established for each particular instruction are satisfied, branch to the
address indicated by "label9" relative to the value of the program counter (PC). When
calculating the address, double the value of "rel8" as a signed extension.
If conditions are not satisfied, no branching can occur.
Conditions for each instruction are listed in Table 7.94-1.
If the conditions established for each particular instruction are satisfied, branch to the
address indicated by "label9" relative to the value of the program counter (PC). When
calculating the address, double the value of "rel8" as a signed extension.
If conditions are not satisfied, no branching can occur.
Conditions for each instruction are listed in Table 7.94-1.
■
Bcc (Branch Relative if Condition Satisfied)
Assembler format:
BRA label9
BV
label9
BNO label9
BNV label9
BEQ label9
BLT
label9
BNE label9
BGE label9
BC
label9
BLE
label9
BNC label9
BGT label9
BN
label9
BLS
label9
BP
label9
BHI
label9
Operation:
if (conditions satisfied) {
PC + 2 + exts (rel8 × 2)
PC + 2 + exts (rel8 × 2)
→
PC
}
Flag change:
N, Z, V, and C: Unchanged
Table 7.94-1 Branching Conditions
Mnemonic
cc
Conditions
Mnemonic
cc
Conditions
BRA
0000
Always satisfied
BV
1000
V = 1
BNO
0001
Always unsatisfied
BNV
1001
V = 0
BEQ
0010
Z = 1
BLT
1010
V xor N = 1
BNE
0011
Z = 0
BGE
1011
V xor N = 0
BC
0100
C = 1
BLE
1100
(V xor N) or Z = 1
BNC
0101
C = 0
BGT
1101
(V xor N) or Z = 0
BN
0110
N = 1
BLS
1110
C or Z = 1
BP
0111
N = 0
BHI
1111
C or Z = 0
N
Z
V
C
–
–
–
–