Fujitsu CM71-00101-5E User Manual
196
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.95
JMP:D (Jump)
This branching instruction has a delay slot.
Branches to the address indicated by "Ri".
Branches to the address indicated by "Ri".
■
JMP:D (Jump)
Assembler format:
JMP : D @Ri
Operation:
Ri
→
PC
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
1 cycle
Instruction format:
Example:
JMP : D @R1
LDI : 8 #0FFH, R1
LDI : 8 #0FFH, R1
; Instruction placed in delay slot
The instruction placed in the delay slot will be executed before execution of the branch destination
instruction.
The value "R1" above will vary according to the specifications of the "LDI:8" instruction placed in
the delay slot.
N
Z
V
C
–
–
–
–
MSB
LSB
1
0
0
1
1
1
1
1
0
0
0
0
Ri
..
.
R1
R1
0 0 0 0
0 0 F F
F F 8 0 0 0 0 0
C 0 0 0 8 0 0 0
PC
C 0 0 0 8 0 0 0
PC
Before execution of "JMP" instruction
After branching
Instruction bit pattern : 1001 1111 0000 0001