Intel Core 2 Duo U7500 U7500 User Manual

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 Specification 

Update 

When a performance monitoring counter is configured for PEBS (Precise Event Based 

Sampling), overflow of the counter results in storage of a PEBS record in the PEBS 

buffer. The information in the PEBS record represents the state of the next instruction 

to be executed following the counter overflow. Due to this erratum, if the counter 

overflow occurs after execution of either MOV SS or STI, storage of the PEBS record is 

delayed by one instruction. 

Implication:  When this erratum occurs, software may observe storage of the PEBS record being 

delayed by one instruction following execution of MOV SS or STI. The state 

information in the PEBS record will also reflect the one instruction delay. 

Workaround: None identified. 

For the steppings affected, see the Summary Tables of Changes. 

Performance Monitor Event FP_MMX_TRANS_TO_MMX (Event CCH, Umask 01H) 

counts transitions from x87 Floating Point (FP) to MMX™ technology instructions. Due 

to this erratum, if only a small number of MMX instructions (including EMMS) are 

executed immediately after the last FP instruction, a FP to MMX technology transition 

may not be counted. 

Implication:  The count value for Performance Monitoring Event FP_MMX_TRANS_TO_MMX may be 

lower than expected. The degree of undercounting is dependent on the occurrences of 

the erratum condition while the counter is active. Intel has not observed this erratum 

with any commercially-available software. 

Workaround: None identified. 

For the steppings affected, see the Summary Tables of Changes. 

The MONITOR instruction is used to arm the address monitoring hardware for the 

subsequent MWAIT instruction. The hardware is triggered on subsequent memory 

store operations to the monitored address range. Due to this erratum, REP 

STOS/MOVS fast string operations to the monitored address range may prevent the 

actual triggering store to be propagated to the monitoring hardware. 

Implication:  A logical processor executing an MWAIT instruction may not immediately continue 

program execution if a REP STOS/MOVS targets the monitored address range. 

Workaround: Software can avoid this erratum by not using REP STOS/MOVS store operations within 

the monitored address range. 

For the steppings affected, see the Summary Tables of Changes.