Motorola 700/800-Series User Manual

Memory Requirements

3-13

❏

self test (if system mode) has completed with error 

❏

MPU clock speed calculation failure 

After debugger initialization is done and none of the above 
situations have occurred, the SYSFAIL

∗

 line is negated. This 

indicates to the user or VMEbus masters the state of the debugger. 
In a multi-computer configuration, other VMEbus masters could 
view the pertinent control and status registers to determine which 
CPU is asserting SYSFAIL

∗

. SYSFAIL

∗

 assertion/negation is also 

affected by the 

 command. Refer to Appendix A. 

The clock speed of the microprocessor is calculated and checked 
against a user definable parameter housed in NVRAM (refer to the 

 command description in Appendix A). If the check fails, a 

warning message is displayed. The calculated clock speed is also 
checked against known clock speeds and tolerances. 

The program portion of 162Bug is approximately 512KB of code, 
consisting of download, debugger, and diagnostic packages and 
contained entirely in Flash or PROM. 

The 162Bug executes from $FF800000 whether in Flash or PROM. If 
you remove the jumper at J21 pins 7 and 8, the address spaces of the 
Flash and PROM are swapped. For 700/800-series MVME162LX 
boards, the factory shipping configuration is with jumper J21 pins 
7-8 removed (so that 162Bug operates out of EPROM).

The 162Bug initial stack completely changes 8KB of SRAM memory 
at addresses offset $C000 from the SRAM base address, at power-
up or reset.