Intel PCI User Manual

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For the 82544GC/EI, when connected to an appropriate SerDes, it can alternatively provide an 
Ethernet interface for 1000 Base-SX or LX applications (IEEE 802.3z).

Note: The 82546EB/82545EM is SerDes PICMG 2.16 compliant. The 82546GB/82545GM is SerDes 

PICMG 3.1 compliant.

82546GB/EB Ethernet controllers also provide features in an integrated dual-port solution 

comprised of two distinct MAC/PHY instances. As a result, they appear as multi-function PCI 
devices containing two identically-functioning Ethernet controllers. See 

 for details.

This section describes the features of the PCI/PCI-X Family of Gigabit Ethernet Controllers.

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32/64-bit 33/66 MHz, PCI Rev 2.3 and PCI-X 1.0a compliant Host interface (82546GB/

82545GM)

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32/64-bit 33/66 MHz, PCI Rev 2.2 and PCI-X 1.0a compliant Host interface (82546EB, 
82545EM, and 82544GC/EI)

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32/64-bit 33/66 MHz, PCI Rev 2.3 compliant Host interface (82541xx)

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32/64-bit 33/66 MHz, PCI Rev 2.2 compliant Host interface (82540EP/EM)

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64-bit addressing for systems with more than 4 GB of physical memory 

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Efficient PCI bus master operation

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Command usage optimization for advanced PCI commands

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Uses dedicated port for client LAN controller directly on an MCH device

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High-speed interface with twice the peak bandwidth of a 32-bit 33 MHz PCI bus

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PCI power management registers recognized by the MCH

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Interface only uses 13 signals

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Auto-Negotiation and Link Setup

— Automatic link configuration including speed, duplex and flow control under IEEE 

802.3ab for copper media

— For GMII/MII mode, the driver complies with the IEEE 802.3ab standard requirements 

for speed, duplex, and flow control Auto-Negotiation capabilities

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Supports half and full duplex operation at 10 Mb/s and 100 Mb/s speeds while working with 

the internal PHY