Intel PCI User Manual
Introduction
6
Software Developer’s Manual
1.4
Conventions
This document uses notes that call attention to important comments:
Note: Indicates details about the hardware’s operations that are not immediately obvious. Read these
notes to get information about exceptions, unusual situations, and additional explanations of some
PCI/PCI-X Family of Gigabit Ethernet Controller features.
1.4.1
Register and Bit References
This document refers to Ethernet controller register names using all capital letters. To refer to a
specific bit in a register the convention REGISTER.BIT is used. For example, CTRL.ASDE refers
to the Auto-Speed Detection Enable bit in the Device Control Register (CTRL).
1.4.2
Byte and Bit Designations
This document uses “B” to abbreviate quantities of bytes. For example, a 4 KB represents 4096
bytes. Similarly, “b” is used to represent quantities of bits. For example, 100 Mb/s represents 100
Megabits per second.
1.5
Related Documents
•
IEEE Std. 802.3, 2000 Edition. Incorporates various IEEE standards previously published
separately.
•
PCI Local Bus Specification, Revision 2.2 and 2.3, PCI Local Bus Special Interest Group.
1.6
Memory Alignment Terminology
Some PCI/PCI-X Family of Gigabit Ethernet Controller data structures have special memory
alignment requirements. This implies that the starting physical address of a data structure must be
alignment requirements. This implies that the starting physical address of a data structure must be
aligned as specified in this manual. The following terms are used for this purpose:
•
BYTE alignment: Implies that the physical addresses can be odd or even. Examples:
0FECBD9A1h, 02345ADC6h.
•
WORD alignment: Implies that physical addresses must be aligned on even boundaries. For
example, the last nibble of the address can only end in 0, 2, 4, 6, 8, Ah, Ch, or Eh
example, the last nibble of the address can only end in 0, 2, 4, 6, 8, Ah, Ch, or Eh
(0FECBD9A2h).
•
DWORD (Double-Word) alignment: Implies that the physical addresses can only be aligned
on 4-byte boundaries. For example, the last nibble of the address can only end in 0, 4, 8, or Ch
on 4-byte boundaries. For example, the last nibble of the address can only end in 0, 4, 8, or Ch
(0FECBD9A8h).
•
QWORD (Quad-Word) alignment: Implies that the physical addresses can only be aligned on
8-byte boundaries. For example, the last nibble of the address can only end in 0 or 8
8-byte boundaries. For example, the last nibble of the address can only end in 0 or 8
(0FECBD9A8h).
•
PARAGRAPH alignment: Implies that the physical addresses can only be aligned on 16-byte
boundaries. For example, the last nibble must be a 0 (02345ADC0h).
boundaries. For example, the last nibble must be a 0 (02345ADC0h).