Intel PCI User Manual

Page of 406
316
Software Developer’s Manual
Register Descriptions
Table 13-86. TXDCTL Register Bit Description
31
25
24
23 22 21
16 15
14 13
8 7
6 5
0
LWTHRESH
RSV
1
1.
82544GC/EI only.
GRAN
RSV
WTHRESH
RSV
HTHRESH
RSV
PTHRESH
Field
Bit(s)
Initial 
Value
Description
PTHRESH
5:0
0b
Prefetch Threshold
Used to control when a pre-fetch of descriptors is considered. 
This threshold refers to the number of valid, unprocessed 
transmit descriptors the Ethernet controller has in its on-chip 
buffer. If this number drops below PTHRESH, the algorithm 
considers prefetching descriptors from host memory. This fetch 
does not happen unless there are at least TXDCTL.HTHRESH 
valid descriptors in host memory to fetch. Value of PTHRESH 
can be in either cache line units, or based on number of 
descriptors based on TXDCTL.GRAN.
Reserved
7:6
0b
Reserved
Reads as 0b. Should be written as 0b for future compatibility.
HTHRESH
15:8
0b
Host Threshold
Provides the threshold of the valid descriptors in host memory A 
descriptor prefetch is performed each time enough valid 
descriptors (TXDCTL.HTHRESH) are available in host memory, 
no other DMA activity of greater priority is pending (descriptor 
fetches and write backs or packet data transfers) and the number 
of transmit descriptors the Ethernet controller has on its on-chip 
buffers drops below TXDCTL.PTHRESH. The value of 
HTHRESH can be in either cache line units, or based on number 
of descriptors based on TXDCTL.GRAN.
Reserved
15:14
0b
Reserved
Reads as 0b. Should be written as 0b for future compatibility.
WTHRESH
21:16
0b
Write Back Threshold
WTHRESH controls the write back of processed transmit 
descriptors. This threshold refers to the number of transmit 
descriptors in the Ethernet controller’s on-chip buffer which are 
ready to be written back to host memory. In the absence of 
external events (explicit flushes), the write back occurs only after 
more than WTHRESH descriptors are available for write back.
WTHRESH must contain a non-zero value to take advantage of 
the write back bursting capabilities of the Ethernet controller. A 
value of 0b causes the descriptors to be written back as soon as 
they are processed.
The value of WTHRESH can be in either cache line units, or 
based on number of descriptors based on RXDCTL.GRAN.