Intel PCI User Manual

56

The following assumption applies to the TCP Segmentation implementation in the Ethernet 
controller:

•

The RS bit operation is not changed. Interrupts are set after data in buffers pointed to by 

individual descriptors is transferred to hardware.

•

Checksums are not accurate above a 12 K frame size.

•

The function of the RPS

1

 bit in the Transmit Descriptor is applicable to all of the packets that 

make up the “TCP Segmentation” context, not the individual packets segmented by hardware.

The transmission process for regular (non-TCP Segmentation packets) involves:

•

The protocol stack receives from an application a block of data that is to be transmitted.

•

The protocol stack calculates the number of packets required to transmit this block based on 
the MTU size of the media and required packet headers.

•

For each packet of the data block:

•

Ethernet, IP and TCP/UDP headers are prepared by the stack.

•

The stack interfaces with the software device driver and commands the driver to send the 

individual packet.

•

The driver gets the frame and interfaces with the hardware.

•

The hardware reads the packet from host memory (via DMA transfers).

•

The driver returns ownership of the packet to the operating system when the hardware has 

completed the DMA transfer of the frame (indicated by an interrupt).

The transmission process for the Ethernet controller TCP segmentation offload implementation 
involves: 

•

The protocol stack receives from an application a block of data that is to be transmitted.

•

The stack interfaces to the software device driver and passes the block down with the 

appropriate header information.

•

The software device driver sets up the interface to the hardware (via descriptors) for the TCP 
Segmentation context.

•

The hardware transfers the packet data and performs the Ethernet packet segmentation and 

transmission based on offset and payload length parameters in the TCP/IP context descriptor 
including:

— Packet encapsulation

— Header generation & field updates including IP and TCP/UDP checksum generation

— The driver returns ownership of the block of data to the operating system when the 

hardware has completed the DMA transfer of the entire data block (indicated by an 

interrupt).

1. 82544GC/EI only.