Renesas SH7264 User Manual

 

 

 

 

Section 7   Interrupt Controller 

 

R01UH0134EJ0400  Rev. 4.00  

 

Page 165 of 2108 

Sep 24, 2014 

 

 

 
SH7262 Group, SH7264 Group 

1 

NMIF 

0 

R 

NMI Interrupt Request 

This bit indicates the status of the NMI interrupt 
request. This bit cannot be modified. 

0: NMI interrupt request has not occurred 

[Clearing conditions] 

  Cleared by changing NMIE of ICR0 
  Cleared by executing NMI interrupt exception 

handling 

1: NMI interrupt request is detected 

[Setting condition] 

  Edge corresponding to NMIE of ICR0 has occurred 

at NMI pin 

Note: Only 640-Kbyte version is valid. For 1-Mbyte 

version, this bit is reserved and always read as 0. 
The write value should always be 0. 

0 NMIM 

1 R/(W)

*

2

 

NMI Mask 

Selects whether to enable interrupt request input to 
external interrupt input pin NMI. 

0: NMI input interrupt request is enabled 

1: NMI input interrupt request is masked 

Note: Only 640-Kbyte version is valid. For 1-Mbyte 

version, this bit is reserved and always read as 0. 
The write value should always be 0.